EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS

Gain

Stage

+ EQ

RBBDC

VBB

Self−Biasing Network

LineEndTermination

VCC

VCC

ESD

IN+

IN−

= 50 W

= 50 W

VOCM

OUT−

OUT+

49.9 W

49.9 W

1 pF

SN65LVCP404

Figure 1. Equivalent Input Circuit Design

Figure 2. Common-Mode Output Voltage Test Circuit

Table 1. CROSSPOINT LOGIC TABLES

OUTPUT CHANNEL 1

OUTPUT CHANNEL 2

OUTPUT CHANNEL 3

OUTPUT CHANNEL 4

CONTROL

INPUT

CONTROL

INPUT

CONTROL

INPUT

CONTROL

INPUT

PINS

SELECTED

PINS

SELECTED

PINS

SELECTED

PINS

SELECTED

S10

S11

1Y/1Z

S20

S21

2Y/2Z

S30

S31

3Y/3Z

S40

S41

4Y/4Z

0

0

1A/1B

0

0

1A/1B

0

0

1A/1B

0

0

1A/1B

0

1

2A/2B

0

1

2A/2B

0

1

2A/2B

0

1

2A/2B

1

0

3A/3B

1

0

3A/3B

1

0

3A/3B

1

0

3A/3B

1

1

4A/4B

1

1

4A/4B

1

1

4A/4B

1

1

4A/4B

AVAILABLE OPTIONS

DESCRIPTION

RGZ (48 pin)

-40°C to 85°C

Serial multiplexer

SN65LVCP404

(1)

The package is available taped and reeled. Add an R suffix to device types (e.g., SN65LVCP404RGZR).

Copyright © 2007–2009, Texas Instruments Incorporated

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