ELECTRICAL CHARACTERISTICS

TIMING REQUIREMENTS

SN65LVDS93

over recommended operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MAX

UNIT

Input voltage threshold

1.4

V

Differential steady-state output voltage magnitude

247

454

mV

Change in the steady-state differential output voltage

50

mV

magnitude between opposite binary states

Steady-state common-mode output voltage

See Figure 3

1.125

1.375

V

Peak-to-peak common-mode output voltage

150

mV

High-level input current

20

µA

Low-level input current

±10

µA

±24

mA

Short-circuit output current

±12

mA

High-impedance state output current

±20

µA

Disabled, All inputs at GND

350

µA

Worst-case pattern (see Figure 4),

95

120

mA

Input capacitance

3

pF

(1)

MIN NOM

MAX

UNIT

Input clock period

14.7

50

ns

High-level input clock pulse width duration

ns

Input signal transition time

5

ns

Data setup time, D0 through D27 before CLKIN

↑ or CLKIN↓ (see Figure 2)

3

ns

Data hold time, D0 through D27 after CLKIN

↓ or CLKIN↑ (see Figure 2)

1.5

ns

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