PCI4510RGVF datasheet(4/220 Pages) TI

Part #	PCI4510RGVF

Description	PC CARD AND INTEGRATED 1394A-2000 OHCI TWO PORT PHY/LINK LAYER CONTROLLER

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Manufacturer	TI [Texas Instruments]

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4 / 220 page

iv

Section

Title

Page

3.8

Power Management Overview

3−17

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.8.1

1394 Power Management (Function 1)

3−17

. . . . . . . . . . . . . . . .

3.8.2

Integrated Low-Dropout Voltage Regulator (LDO-VR)

3−17

. . . .

3.8.3

CardBus (Function 0) Clock Run Protocol

3−18

. . . . . . . . . . . . . .

3.8.4

CardBus PC Card Power Management

3−18

. . . . . . . . . . . . . . . .

3.8.5

16-Bit PC Card Power Management

3−18

. . . . . . . . . . . . . . . . . . .

3.8.6

Suspend Mode

3−18

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.8.7

Requirements for Suspend Mode

3−19

. . . . . . . . . . . . . . . . . . . . .

3.8.8

Ring Indicate

3−19

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.8.9

PCI Power Management for CardBus (Function 0)

3−20

. . . . . .

3.8.10

CardBus Bridge Power Management

3−21

. . . . . . . . . . . . . . . . . .

3.8.11

ACPI Support

3−22

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.8.12

Master List of PME Context Bits and Global Reset-Only Bits

for CardBus (Function 0)

3−22

. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.8.13

Master List of Global Reset-Only Bits for 1394 OHCI

(Function 1)

3−23

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.9

Low-Voltage CardBus Card Detection

3−23

. . . . . . . . . . . . . . . . . . . . . . . . . .

3.10

Power Switch Interface

3−24

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.11

IEEE 1394 Application Information

3−25

. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.11.1

PHY Port Cable Connection

3−25

. . . . . . . . . . . . . . . . . . . . . . . . . .

3.11.2

Crystal Selection

3−26

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3.11.3

Bus Reset

3−27

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4

PC Card Controller Programming Model

4−1

. . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.1

PCI Configuration Registers (Function 0)

4−1

. . . . . . . . . . . . . . . . . . . . . . .

4.2

Vendor ID Register

4−2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.3

Device ID Register

4−2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.4

Command Register

4−3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.5

Status Register

4−4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.6

Class Code and Revision ID Registers

4−5

. . . . . . . . . . . . . . . . . . . . . . . . .

4.7

Cache Line Size Register

4−5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.8

Latency Timer Register

4−5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.9

Header Type Register

4−6

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.10

BIST Register

4−6

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.11

CardBus Socket Registers/ExCA Base Address Register

4−6

. . . . . . . . .

4.12

Capability Pointer Register

4−7

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.13

Secondary Status Register

4−8

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.14

PCI Bus Number Register

4−9

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.15

CardBus Bus Number Register

4−9

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.16

Subordinate Bus Number Register

4−9

. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.17

CardBus Latency Timer Register

4−10

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.18

CardBus Memory Base Registers 0, 1

4−10

. . . . . . . . . . . . . . . . . . . . . . . . . .

4.19

CardBus Memory Limit Registers 0, 1

4−11

. . . . . . . . . . . . . . . . . . . . . . . . . .

4.20

CardBus I/O Base Registers 0, 1

4−11

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

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