LM48580

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SNAS491A – FEBRUARY 2010 – REVISED MAY 2013

Figure 3. YZR0012 Package View (Bumps Up)

PIN DESCRIPTIONS

Bump

Name

Description

A1

OUT+

Amplifier Non-Inverting Output

A2

SGND

Amplifier Ground

A3

IN+

Amplifier Non-Inverting Input

B1

OUT-

Amplifier Inverting Output

Gain Select:

B2

GAIN

B3

IN-

Amplifier Inverting Input

C1

Active Low Shutdown. Drive SHDN low to disable device.

C2

SHDN

C3

Power Supply

D1

Boost Converter Output

D2

SW

Boost Converter Switching Node

D3

PGND

Boost Converter Ground

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

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