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PCM1718E Datasheet(PDF) 2 Page - Texas Instruments |
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PCM1718E Datasheet(HTML) 2 Page - Texas Instruments |
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2 / 14 page  ® 2 PCM1718E SPECIFICATIONS All specifications at +25 °C, +V CC = +VDD = +5V, fs = 44.1kHz, and 18-bit input data, SYSCLK = 384fs, unless otherwise noted. Measurement bandwidth is 20kHz. PCM1718E PARAMETER CONDITIONS MIN TYP MAX UNITS RESOLUTION 16 18 Bits DIGITAL INPUT/OUTPUT Logic Family CMOS Input Logic Level: VIH(2) 70% of VDD V VIL(2) 30% of VDD V VIH(3) 70% of VDD V VIL(3) 30% of VDD V VIH(4) 64% of VDD V VIL(4) 28% of VDD V Input Logic Current: IIH(5) –6.0 µA IIL(5) –120 µA IIH(6) –2 µA IIL(6) 0.02 µA IIH(4) VIN = 3.2V 40 µA IIL(4) VIN = 1.4V –40 µA Output Logic Level: (+VDD = +5V) VOH(7) IOH = –5mA 3.8 V VOL(7) IOL = +5mA 1.0 V VOL(8) IOL = +5mA 1.0 V Interface Format Selectable Normal, I2S Data Format 16/18 Bits MSB First Binary Two’s Complement Sampling Frequency 32 44.1 48 kHz System Clock Frequency 256fs/384fs 8.192/12.288 11.2896/16.9344 12.288/18.432 MHz DC ACCURACY Gain Error ±1.0 ±5.0 % of FSR Gain Mismatch Channel-to-Channel ±1.0 ±5.0 % of FSR Bipolar Zero Error VO = 1/2 VCC at Bipolar Zero ±30 mV DYNAMIC PERFORMANCE(1) VCC = +5V, f = 991Hz THD+N at FS (0dB) –90 –80 dB THD+N at –60dB –34 dB Dynamic Range EIAJ, A-weighted 90 96 dB Signal-To-Noise Ratio EIAJ, A-weighted 92 100 dB Channel Separation 90 97 dB Level Linearity Error (–90dB) ±0.5 dB DYNAMIC PERFORMANCE(1) VCC = +3V, f = 991Hz THD+N at FS (0dB) –86 dB Dynamic Range EIAJ, A-weighted 91 dB Signal-To-Noise Ratio EIAJ, A-weighted 94 dB DIGITAL FILTER PERFORMANCE Pass Band Ripple ±0.17 dB Stop Band Attenuation –35 dB Pass Band 0.445 fs Stop Band 0.555 fs De-emphasis Error (fs = 32kHz ~ 48kHz) –0.2 +0.55 dB Delay Time (Latency) 11.125/fs sec ANALOG OUTPUT Voltage Range FS (0dB) OUT 62% of VCC Vp-p Load Impedance 5k Ω Center Voltage 50% of VCC V POWER SUPPLY REQUIREMENTS Voltage Range: +VCC +2.7 +5.5 VDC +VDD +2.7 +5.5 VDC Supply Current: +ICC +IDD(9) +VCC = +VDD = +5V 18.0 25.0 mA +VCC = +VDD = +3V 9.0 15.0 mA Power Dissipation +VCC = +VDD = +5V 90 125 mW +VCC = +VDD = +3V 27 45 mW TEMPERATURE RANGE Operation –25 +85 °C Storage –55 +100 °C NOTES: (1) Tested with Shibasoku #725 THD. Meter 400Hz HPF, 30kHz LPF On, Average Mode with 20kHz bandwidth limiting. (2) Pins 4, 5, 6, 14: LRCIN, DIN, BCKIN, FORMAT. (3) Pins 15, 16, 17, 18: RSTB, DM0, DM1, MUTE (Schmitt trigger input). (4) Pin 1: XTI. (5) Pins 15, 16, 17, 18: RSTB, DM0, DM1, MUTE (if pull-up resistor is used). (6) Pins 4, 5, 6: LRCIN, DIN, BCKIN (if pull-up resistor is not used). (7) Pin 19: CLKO. (8) Pin 7: ZERO. (9) No load on pins 19 (CLKO) and 20 (XTO). Not Recommended For New Designs |
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Similar Description - PCM1718E |
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