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SN74CBTS3306PW Datasheet(PDF) 1 Page - Texas Instruments |
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SN74CBTS3306PW Datasheet(HTML) 1 Page - Texas Instruments |
1 / 13 page SN74CBTS3306 DUAL FET BUS SWITCH WITH SCHOTTKY DIODE CLAMPING SCDS029I − JANUARY 1996 − REVISED JANUARY 2004 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D 5-Ω Switch Connection Between Two Ports D TTL-Compatible Input Levels description/ordering information The SN74CBTS3306 features independent line switches with Schottky diodes on the I/Os to clamp undershoot. Each switch is disabled when the associated output-enable (OE) input is high. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING SOIC − D Tube SN74CBTS3306D CR306 −40 °C to 85°C SOIC − D Tape and reel SN74CBTS3306DR CR306 −40 °C to 85°C TSSOP − PW Tube SN74CBTS3306PW CR306 TSSOP − PW Tape and reel SN74CBTS3306PWR CR306 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. FUNCTION TABLE (each bus switch) INPUT OE FUNCTION L A port = B port H Disconnect logic diagram (positive logic) 1A 1B 1OE 2A 2B 2OE 2 1 5 7 3 6 Copyright 2004, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. D OR PW PACKAGE (TOP VIEW) 1 2 3 4 8 7 6 5 VCC 2OE 2B 2A 1OE 1A 1B GND |
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