OZ965 datasheet(4/7 Pages) ETC

Part #	OZ965

Description	High-Efficiency Inverter Controller

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4 / 7 page

OZ965

OZ965-SF-3.0

Page 4

FUNCTIONAL SPECIFICATIONS

Parameter

Symbol

Test Conditions

Limits

Unit

4.75 V < VDD < 5.25 V

Min

Typ

Max

Reference Voltage

Nominal voltage

Vref

Iload = 0.1 mA,

2.37

2.50

2.63

V

Line regulation

-

6

-

mV/V

Load regulation

Iload = 0.2 mA to 1.0 mA

-

1

-

mV/mA

Oscillator

Initial accuracy

fosc

Ct = 470 pF, Rt = 49.9 k

81

KHz

Ramp peak

-

2.54

-

V

Ramp valley

-

0.48

-

V

Temp. stability

TA = -40

oC to 85oC

-

200

ppm/

oC

Error Amplifier

Input bias current

ADJ=FB=2.0 V

-

0.25

-

uA

Input offset voltage

VFB = 4.0 V

5

10

mV

Input voltage range

0

-

VDD-

1.5

V

Open loop voltage gain

-

65

-

dB

Unity gain bandwidth

-

1.5

-

MHz

Power supply rejection

-

60

-

dB

Under-Voltage Lockout

Positive-going threshold voltage

See Table 1, page 5

Negative-going threshold voltage

See Table 1, page 5

Supply

Supply current - Enable Low

IOFF

-

195

-

µA

Supply current - Enable High

ION

VDD = 5.0 V

-

1.0

-

mA

NDR output

Output high voltage

VOH

Isource = 10 mA, VDD = 5V

-

4.75

-

V

Output low voltage

VOL

Isink = 10 mA, VDD = 5V

-

0.25

0.5

V

Output resistance

ROUT

-

10

-

Ω

PDR output

Output high voltage

VOH

Isource = 10 mA, VDD = 5V

-

4.7

-

V

Output low voltage

VOL

Isink = 10 mA, VDD = 5V

-

0.5

-

V

Output resistance

ROUT

-

15

-

Ω

Break-Before-Make

Qn off to Qp on delay

THL

-

250

-

ns

Qp off to Qn on delay

TLH

-

220

-

Ns

High Clamp

OPS=1 V VHCLMP=0V

92

94

96

Duty cycle of NDR

HCLMP

OPS=1 V, VHCLMP=1.8V

-

14

-

%

Low Clamp

OPS=0 V, VLCLMP=0V

92

94

96

Duty cycle of NDR

LCLMP

OPS=0 V, VLCLMP=1.8V

-

14

-

%

Max. / Min. Duty cycle

Duty cycle of NDR

6

-

95

%

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