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SN74LV1T04DBVR Datasheet(PDF) 8 Page - Texas Instruments |
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SN74LV1T04DBVR Datasheet(HTML) 8 Page - Texas Instruments |
8 / 18 page VMI From Output Under Test CL (see Note A) LOAD CIRCUIT 1 M Ω VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS tPLH tPHL tPHL tPLH VOH VOH VOL VOL VI 0 V Input Output Output NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns. C. The outputs are measured one at a time, with one transition per measurement. D. tPLH and tPHL are the same as tpd. VMO VMo VMo VMo VMI VCC = 2.5 V ± 0.2 V VCC = 3.3 V ± 0.3 V CL VMI VMO 5, 10, 15, 30 pF VI/2 VCC/2 5, 10, 15, 30 pF VI/2 VCC/2 SN74LV1T04 SCLS738B – SEPTEMBER 2013 – REVISED FEBRUARY 2014 www.ti.com 5 Parameter Measurement Information Figure 6. Load Circuit and Voltage Waveforms 5.1 More Product Selection DEVICE PACKAGE DESCRIPTION SN74LV1T00 DCK, DBV 2-Input Positive-NAND Gate SN74LV1T02 DCK, DBV 2-Input Positive-NOR Gate SN74LV1T04 DCK, DBV Inverter Gate SN74LV1T08 DCK, DBV 2-Input Positive-AND Gate SN74LV1T17 DCK, DBV Single Buffer Gate with 3-state Output SN74LV1T14 DCK, DBV Single Schmitt-Trigger Inverter Gate SN74LV1T32 DCK, DBV 2-Input Positive-OR Gate SN74LV1T50 DCK, DBV Single Buffer Gate with 3-state Output SN74LV1T86 DCK, DBV Single 2-Input Exclusive-Or Gate SN74LV1T125 DCK, DBV Single Buffer Gate with 3-state Output SN74LV1T126 DCK, DBV Single Buffer Gate with 3-state Output SN74LV4T125 RGY, PW Quadruple Bus Buffer Gate With 3-State Outputs 8 Submit Documentation Feedback Copyright © 2013–2014, Texas Instruments Incorporated Product Folder Links: SN74LV1T04 |
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