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SN74LVC112APWRG4 Datasheet(PDF) 3 Page - Texas Instruments

Part # SN74LVC112APWRG4
Description  SN74LVC112A Dual Negative-Edge-Triggered J-K Flip-Flop With Clear And Preset
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SN74LVC112APWRG4 Datasheet(HTML) 3 Page - Texas Instruments

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10
9
1CLK
1K
1J
1PRE
1Q
1Q
2Q
GND
VCC
1CLR
2CLR
2CLK
2K
2J
2PRE
2Q
D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
SN74LVC112A
www.ti.com
SCAS289M – JANUARY 1993 – REVISED DECEMBER 2014
6 Pin Configuration and Functions
Pin Functions
PIN
TYPE
DESCRIPTION
NO.
NAME
1
1CLK
I
1 Clock
2
1K
I
1K Input
3
1J
I
1J Input
4
1PRE
I
1 Preset
5
1Q
O
1Q Output. Pull low to set 1Q high and 1Q low upon power-up.
6
1Q
O
1Q Output
7
2Q
O
2Q Output
8
GND
—
Ground Pin
9
2Q
O
2Q Output
10
2PRE
I
2 Preset
11
2J
I
2J Input. Pull low to set 2Q high and 2Q low upon power-up.
12
2K
I
2K Input
13
2CLK
I
2 Clock
14
2CLR
I
2 Clear
15
1CLR
I
1 Clear. Pull low to set 2Q low and 2Q high upon power-up.
16
VCC
—
Power Pin. Pull low to set 1Q low and 1Q high upon power-up.
Copyright © 1993–2014, Texas Instruments Incorporated
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