SN54LVTH543, SN74LVTH543

3.3V ABT OCTAL REGISTERED TRANSCEIVERS

WITH 3STATE OUTPUTS

SCBS704F − AUGUST 1997 − REVISED OCTOBER 2003

2

POST OFFICE BOX 655303

description/ordering information (continued)

The ’LVTH543 devices contain two sets of D-type latches for temporary storage of data flowing in either

direction. Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for

each register, to permit independent control in either direction of data flow.

The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and

LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches

in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the data present

at the output of the A latches. Data flow from B to A is similar, but requires using the CEBA, LEBA, and OEBA

inputs.

Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors

with the bus-hold circuitry is not recommended.

the minimum value of the resistor is determined by the current-sinking capability of the driver.

disables the outputs, preventing damaging current backflow through the device when it is powered down. The

power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,

which prevents driver conflict.

FUNCTION TABLE†

INPUTS

OUTPUT

CEAB

LEAB

OEAB

A

OUTPUT

B

H

X

X

X

Z

X

XH

X

Z

L

HL

X

B0‡

L

LL

L

L

L

L

L

H

H

† A-to-B data flow is shown; B-to-A flow control is the

same, except that it uses CEBA, LEBA, and

OEBA.

‡ Output level before the indicated steady-state

input conditions were established