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LMH0366 Datasheet(PDF) 9 Page - Texas Instruments |
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LMH0366 Datasheet(HTML) 9 Page - Texas Instruments |
9 / 38 page LMH0366 www.ti.com SNAS585D – APRIL 2012 – REVISED APRIL 2013 Functional Description The LMH0366 is a multi-rate reclocker for serial digital video data and operates at 125 Mbps, 270 Mbps, 1.4835 Gbps, 1.485 Gbps, 2.967 Gbps, and 2.97 Gbps. The LMH0366 recovers the serial clock and retimes the serial data stream to suppress accumulated jitter. Modes of Operation The LMH0366 has two modes of operation: pin mode (SPI_EN = 0) and SPI mode (SPI_EN = 1). In pin mode, the LMH0366 functions are controlled by control pins only. SPI mode allows access to SPI registers for controlling all LMH0366 features, including additional features such as: • Eye opening monitor • Output driver amplitude, common mode voltage, and de-emphasis controls • Input signal detection • More control over which signals are sent to the output drivers • Full details of the locked data rate • Ability to distinguish between 1.4835 and 1.485 Gbps, and between 2.967 and 2.97 Gbps (in external reference mode) • Ability to configure device pins as GPIOs • Ability to power down unused features for power savings The LMH0366 SPI protocol is described in the SPI Register Access section. Four device pins are dual mode and change functionality depending on whether the device is in pin mode or SPI mode, as indicated in Table 1. Table 1. Pin Mode vs. SPI Mode Pin Changes Pin Pin Mode (SPI_EN = 0) SPI Mode (SPI_EN = 1) 5 BYPASS MOSI 6 MUTE SCK 19 SCO_EN SS 20 VEE MISO SPI mode provides the ability to configure two device pins as general purpose input/output (GPIO) pins. With default register settings, pins 24 and 1 operate as RATE0 and RATE1. In SPI mode, these pins can be configured as GPIOs (GPIO0 and GPIO1 respectively), but they do not explicitly change function to GPIOs upon entering SPI mode by setting SPI_EN high. These pins will continue to operate as RATE0 and RATE1 until they are optionally configured differently via SPI register writes. Once changed, these pins will continue to operate as GPIOs even after reentering pin mode by setting SPI_EN low. Serial Data Input The LMH0366 input has a 100 Ω differential internal termination and supports a rail-to-rail input common mode voltage for versatility in DC input coupling. It is intended to be DC coupled to devices such as the LMH0394 adaptive cable equalizer. The input is equalized and includes signal detection with a programmable threshold, accessible via the SPI. Input FR4 Equalization The input includes an FR4 equalizer capable of equalizing up to 60” of FR4 trace. The FR4 equalizer can be optimized for long trace lengths via the SPI. For input FR4 trace lengths longer than 40”, it is recommended to set register 0x11 bit 1 (EQ_BOOST_60) to enable additional equalizer boost in order to compensate for the longer trace length. Copyright © 2012–2013, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Links: LMH0366 |
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