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PI4IOE5V9537UEX Datasheet(PDF) 5 Page - Pericom Semiconductor Corporation |
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PI4IOE5V9537UEX Datasheet(HTML) 5 Page - Pericom Semiconductor Corporation |
5 / 13 page |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||| ||||||||||||||||| 2016-01-0029 PT0565-1 02/15/16 5 PI4IOE5V9537 4-bit I 2C-bus and SMBus low power I/O port with interrupt and reset Dynamic Characteristics Table 3: Dynamic characteristics Symbol Parameter Test Conditions Standard mode I 2C Fast mode I 2C Fast mode Plus I 2C Unit Min Max Min Max Min Max fSCL SCL clock frequency 0 100 0 400 0 1000 kHz tBUF bus free time between a STOP and START condition 4.7 - 1.3 - 0.5 - μs tHD;STA hold time (repeated) START condition 4.0 - 0.6 - 0.26 - μs tSU;STA set-up time for a repeated START condition 4.7 - 0.6 - 0.26 - μs tSU;STO set-up time for STOP condition 4.0 - 0.6 - 0.26 - μs tVD;ACK [1] data valid acknowledge time - 3.45 - 0.9 - 0.45 μs tHD;DAT [2] data hold time 0 - 0 - 0 - ns tVD;DAT data valid time - 3.45 - 0.9 - 0.45 us tSU;DAT data set-up time 250 - 100 - 50 - ns tLOW LOW period of the SCL clock 4.7 - 1.3 - 0.5 - μs tHIGH HIGH period of the SCL clock 4.0 - 0.6 - 0.26 - μs tf fall time of both SDA and SCL signals - 300 - 300 - 120 ns tr rise time of both SDA and SCL signals - 1000 - 300 - 120 ns tSP pulse width of spikes that must be suppressed by the input filter - 50 - 50 50 ns Port timing tv(Q) Data output valid time [3] - 200 - 200 - 200 ns tsu(D) Data input set-up time 100 - 100 - 100 - ns th(D) Data input hold time 1 - 1 - 1 - μs Interrupt timing tv(INT) Valid time on pin INT - 4 - 4 - 4 μs trst(INT) Reset time on pin INT - 4 - 4 - 4 μs |
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