www.ti.com

SYSTEM CLOCK

SCKI

0.8 V

SCKI

2 V

T0005B07

FADE-IN AND FADE-OUT FUNCTIONS

PCM1807

SLES147 – SEPTEMBER 2005

system clock must be supplied on SCKI (pin 6).

The PCM1807 has a system clock detection circuit which automatically senses if the system clock is operating at

the serial control port, which uses MD (pin 10), MC (pin 11), and MS (pin 12). The system clock is divided down

delta-sigma modulator, respectively.

Table 1 shows some typical relationships between sampling frequency and system clock frequency, and

Figure 17 shows system clock timing.

Table 1. Sampling Frequency and System Clock Frequency

SAMPLING FREQUENCY (kHz)

16

4.096

6.144

8.192

32

8.192

12.288

16.384

44.1

11.2896

16.9344

22.5792

48

12.288

18.432

24.576

64

16.384

24.576

32.768

88.2

22.5792

33.8688

45.1584

96

24.576

36.864

49.152

SYMBOL

PARAMETER

MIN

MAX

UNIT

System clock pulse duration, HIGH

8

ns

System clock pulse duration, LOW

8

ns

Figure 17. System Clock Timing

The PCM1807 has fade-in and fade-out functions on DOUT (pin 9) to avoid pop noise, and the functions come

into operation in some cases as described in several following sections. The level changes from 0 dB to mute or

mute to 0 dB are performed using calculated pseudo S-shaped characteristics with zero-cross detection.

Because of the zero-cross detection, the time needed for the fade in and fade out depends on the analog input

processing.

11