IDT82V3011PV datasheet(1/30 Pages) IDT

Part #	IDT82V3011PV

Description	T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT

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Manufacturer	IDT [Integrated Device Technology]

Direct Link	http://www.idt.com

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The IDT logo is a registered trademark of Integrated Device Technology, Inc.

INDUSTRIAL TEMPERATURE RANGE

2003 Integrated Device Technology, Inc.

OCTOBER 22, 2003

DSC-6237/3

T1/E1/OC3 WAN PLL WITH

SINGLE REFERENCE INPUT

IDT82V3011

FUNCTIONAL BLOCK DIAGRAM

TIE Control

Block

Input Frequency

Selection

F_sel0

F_sel1

Freerun

Normal Holdover

Fref

FLOCK

Invalid Input

Signal

Detection

MODE_sel0

MODE_sel1

TIE_en

Virtual

Reference

Feedback Signal

C16o

C8o

C4o

C2o

C3o

C1.5o

F0o

F8o

F16o

RSP

TSP

F19o

C6o

LOCK

F32o

C19POS

C19NEG

OSC

OSCi

TCLR

V

DD

V

SS

V

SS

TDO TDI

JTAG

TMS

TRST

TCK

V

DD

V

SS

V

DD

V

DD

V

SS

RST

State Control Circuit

Reference

Input Monitor

MON_out

C32o

C19o

DPLL

C2/C1.5

FEATURES

• Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum

4 Enhanced and Stratum 4 timing for DS1 interfaces

• Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing

for E1 interface

• Selectable input reference: 8 kHz, 1.544 MHz, 2.048 MHz or 19.44

MHz

• Provides C1.5o, C3o, C2o, C4o, C6o, C8o, C16o, C19o and C32o

output clock signals

• Provides 7 types of 8 kHz framing pulses: F0o, F8o, F16o, F19o,

F32o, RSP and TSP

• Provides a C2/C1.5 output clock signal with the frequency

controlled by the reference input Fref

• Holdover frequency accuracy of 0.025 ppm

• Phase slope of 5 ns per 125 µs

• Attenuates wander from 2.1 Hz

• Fast lock mode

• Provides Time Interval Error (TIE) correction

• MTIE of 600 ns

• JTAG boundary scan

• Holdover status indication

• Freerun status indication

• Normal status indication

• Lock status indication

• Input reference quality indication

• 3.3 V operation with 5 V tolerant I/O

• Package available: 56-pin SSOP

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