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THS10064 Datasheet(PDF) 4 Page - Texas Instruments |
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THS10064 Datasheet(HTML) 4 Page - Texas Instruments |
4 / 42 page THS10064 SLAS255B – DECEMBER 1999 – REVISED DECEMBER 2002 www.ti.com 4 ELECTRICAL CHARACTERISTICS over recommended operating conditions, VREF = internal, fs = 6 MHz, fI = 2 MHz at –1 dBFS (unless otherwise noted) AC SPECIFICATIONS, AVDD =5 V, BVDD = DVDD = 3.3 V, CL < 30 pF PARAMETER TEST CONDITIONS MIN TYP MAX UNIT SINAD Signal to noise ratio + distortion Differential mode 56 59 dB SINAD Signal-to-noise ratio + distortion Single-ended mode(1) 55 59 dB SNR Signal to noise ratio Differential mode 59 61 dB SNR Signal-to-noise ratio Single-ended mode(1) 58 60 dB THD Total harmonic distortion Differential mode –64 –61 dB THD Total harmonic distortion Single-ended mode –63 –60 dB ENOB Effective number of bits Differential mode 9 9.5 Bits (SNR) Effective number of bits Single-ended mode(1) 8.85 9.35 Bits SFDR Spurious free dynamic range Differential mode 61 65 dB SFDR Spurious free dynamic range Single-ended mode 60 64 dB Analog Input Full-power bandwidth with a source impedance of 150 Ω in differential configuration. Full scale sinewave, –3 dB 96 MHz Full-power bandwidth with a source impedance of 150 Ω in single-ended configuration. Full scale sinewave, –3 dB 54 MHz Small-signal bandwidth with a source impedance of 150 Ω in differential configuration. 100 mVpp sinewave, –3 dB 96 MHz Small-signal bandwidth with a source impedance of 150 Ω in single-ended configuration. 100 mVpp sinewave, –3 dB 54 MHz (1) The SNR (ENOB) and SINAD is degraded typically by 2 dB in single-ended mode when the reading of data is asynchronous to the sampling clock. TIMING SPECIFICATIONS(1) AVDD = 5 V, DVDD = BVDD = 3.3 V, VREF = internal, CL < 30 pF PARAMETER TEST CONDITIONS MIN TYP MAX UNIT td(DATA_AV) Delay time 5 ns td(o) Delay time 5 ns tpipe Latency 5 CONV CLK (1) See Figure 27. |
Similar Part No. - THS10064_09 |
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Similar Description - THS10064_09 |
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