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TL4810BIN Datasheet(PDF) 1 Page - Texas Instruments |
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TL4810BIN Datasheet(HTML) 1 Page - Texas Instruments |
1 / 7 page TL4810B, TL4810BI VACUUM FLUORESCENT DISPLAY DRIVERS SLDS006C – DECEMBER 1984 – REVISED MAY 1993 1 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 D Each Device Drives Ten Lines D 60-V Output Voltage Rating D 40-mA Output Source Current D High-Speed Serially-Shifted Data Input D CMOS-Compatible Inputs D Latches on All Driver Outputs D Improved Direct Replacement for UCN4810A and TL4810A description The TL4810B and TL4810BI are monolithic BIDFET† integrated circuits designed to drive a dot matrix or segmented vacuum fluorescent display (VFD). These devices feature a serial data output to cascade additional devices for large display arrays. A 10-bit data word is serially loaded into the shift register on the positive-going transitions of the clock. Parallel data is transferred to the output buffers through a 10-bit D-type latch while LATCH ENABLE is high and is latched when LATCH ENABLE is low. When BLANKING is high, all outputs are low. Outputs are totem-pole structures formed by npn emitter-follower and double-diffused MOS (DMOS) transistors with output voltage ratings of 70 V and 40-mA source-current capability. All inputs are compatible with CMOS and TTL levels, but each requires the addition of a pullup resistor to VCC1 when driven by TTL logic. The TL4810B is characterized for operation from 0 °C to 70°C. The TL4810BI is characterized for operation from – 40 °C to 85°C. † BIDFET – Bipolar, double-diffused, N-channel and P-channel MOS transistors on same chip. This is a patented process. Copyright © 1993, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 Q8 Q7 Q6 CLOCK GND VCC1 LATCH ENABLE (STROBE) Q5 Q4 Q9 Q10 SERIAL DATA OUT VCC2 DATA IN BLANKING Q1 Q2 Q3 N PACKAGE (TOP VIEW) 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 Q8 Q7 Q6 CLOCK GND NC VCC1 LATCH ENABLE (STROBE) Q5 Q4 Q9 Q10 NC SERIAL DATA OUT VCC2 DATA IN BLANKING Q1 Q2 Q3 DW PACKAGE (TOP VIEW) NC – No internal connection |
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