DS1556 1M, Nonvolatile, Y2K-Compliant Timekeeping RAM

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SETTING THE CLOCK

The MSB bit, B7, of the Control Register is the write bit. Setting the write bit to a 1, like the read bit,

halts updates to the DS1556 (1FFF8h to 1FFFFh) registers. After setting the write bit to a 1, RTC

Registers can be loaded with the desired RTC count (day, date, and time) in 24-hour BCD format. Setting

the write bit to a 0 then transfers the values written to the internal RTC Registers and allows normal

operation to resume.

CLOCK ACCURACY (DIP MODULE)

The DS1556 is guaranteed to keep time accuracy to within

±1 minute per month at 25°C. The RTC is

calibrated at the factory by Dallas Semiconductor using nonvolatile tuning elements, and does not require

additional calibration. For this reason, methods of field clock calibration are not available and not

necessary. The electrical environment also affects clock accuracy, and caution should be taken to place

the RTC in the lowest-level EMI section of the PC board layout. For additional information, please refer

to Application Note 58.

CLOCK ACCURACY (PowerCap MODULE)

The DS1556 and DS9034PCX are each individually tested for accuracy. Once mounted together, the

module will typically keep time accuracy to within

±1.53 minutes per month (35 ppm) at 25°C. The

electrical environment also affects clock accuracy, and caution should be taken to place the RTC in the

lowest-level EMI section of the PC board layout. For additional information, please refer to

Application Note 58.

FREQUENCY TEST MODE

The DS1556 frequency test mode uses the open drain

IRQ/FT output. With the oscillator running, the

IRQ/FT output will toggle at 512 Hz when the FT bit is a 1, the Alarm Flag Enable bit (AE) is a 0, and

the Watchdog Steering bit (WDS) is a 1 or the Watchdog Register is reset (Register 1FFF7h = 00h). The

IRQ/FT output and the frequency test mode can be used as a measure of the actual frequency of the

32.768 kHz RTC oscillator. The

IRQ/FT pin is an open-drain output that requires a pullup resistor for

proper operation. The FT bit is cleared to a 0 on power-up.

USING THE CLOCK ALARM

The alarm settings and control for the DS1556 reside within Registers 1FFF2h to 1FFF5h. Register

1FFF6h contains two alarm enable bits: Alarm Enable (AE) and Alarm in Backup Enable (ABE). The AE

and ABE bits must be set as described below for the

IRQ/FT output to be activated for a matched alarm

condition.

The alarm can be programmed to activate on a specific day of the month or repeat every day, hour,

minute, or second. It can also be programmed to go off while the DS1556 is in the battery-backed state of

operation to serve as a system wake-up. Alarm mask bits AM1 to AM4 control the alarm mode. Table 3

shows the possible settings. Configurations not listed in the table default to the once per second mode to

notify the user of an incorrect alarm setting.