TLC320AD52CDW datasheet(2/57 Pages) TI1

Part #	TLC320AD52CDW

Description	SIGMA-DELTA ANALOG INTERFACE CIRCUITS WITH MASTER-SLAVE FUNCTION

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iii

Contents

Section

Title

Page

1

Introduction

1–1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.1

Features

1–1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.2

Functional Block Diagram

1–2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.3

Terminal Assignments

1–3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.4

Ordering Information

1–4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.5

Terminal Functions

1–4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.6

Definitions and Terminology

1–6

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1.7

Register Functional Summary

1–7

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2

Detailed Description

2–1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1

Device Functions

2–1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1.1

Operating Frequencies and Filter Control

2–1

. . . . . . . . . . . . . .

2.1.2

ADC Signal Channel

2–1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1.3

DAC Signal Channel

2–2

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1.4

Serial Interface

2–3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1.5

Register Programming

2–3

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1.6

Sigma-Delta ADC

2–5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1.7

Decimation Filter

2–5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1.8

Sigma-Delta DAC

2–5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1.9

Interpolation Filter

2–5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.1.10

Analog and Digital Loopback

2–5

. . . . . . . . . . . . . . . . . . . . . . . . .

2.1.11

FIR Overflow Flag

2–5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2

Reset and Power-Down Functions

2–6

. . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.2.1

Software and Hardware Reset

2–6

. . . . . . . . . . . . . . . . . . . . . . . .

2.2.2

Software and Hardware Power Down

2–6

. . . . . . . . . . . . . . . . . .

2.3

Master Clock Circuit

2–7

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4

Data Out (DOUT)

2–7

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4.1

Data Out, Master Mode

2–7

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.4.2

Data Out, Slave Mode

2–7

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.5

Data In (DIN)

2–7

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

2.6

FC (Hardware Secondary Communication Request)

2–7

. . . . . . . . . . . . .

2.7

Frame-Sync Function for TLC320AD50C

2–7

. . . . . . . . . . . . . . . . . . . . . . .

2.7.1

Frame Sync (FS) Function, Master Mode

2–8

. . . . . . . . . . . . . .

2.7.2

Frame Sync (FS) Function,Slave Mode

2–8

. . . . . . . . . . . . . . . .

2.7.3

Frame-Sync Delayed (FSD) Function, Master Mode

2–9

. . . . .

2.7.4

Frame-Sync Delayed (FSD), Slave Mode

2–9

. . . . . . . . . . . . . .

2.8

Frame-Sync Function for TLC320AD52C

2–11

. . . . . . . . . . . . . . . . . . . . . . .

2.9

Multiplexed Analog Input and Output

2–11

. . . . . . . . . . . . . . . . . . . . . . . . . . .

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