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TLC2942IDBLE Datasheet(PDF) 7 Page - Texas Instruments |
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TLC2942IDBLE Datasheet(HTML) 7 Page - Texas Instruments |
7 / 29 page TLC2942 HIGH-PERFORMANCE DUAL PHASE-LOCKED LOOP BUILDING BLOCK SLAS146B – NOVEMBER 1996 – REVISED JUNE 1997 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage (each supply), VDD (see Note 1) 7 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input voltage range (each input), VI (see Note 1) – 0.5 V to VDD + 0.5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input current (each input), II ±20 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output current (each output), IO ±20 mA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Continuous total power dissipation, at (or below) TA = 25°C (see Note 2) 1160 mW . . . . . . . . . . . . . . . . . . . . . . Operating free-air temperature range, TA –20 °C to 75°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Storage temperature range, Tstg –65 °C to 150°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to network GND. 2. For operation above 25 °C free-air temperature, derate linearly at the rate of 9.3 mW/°C. recommended operating conditions MIN NOM MAX UNIT Supply voltage VDD (each supply see Note 3) VDD = 3 V 2.85 3 3.15 V Supply voltage, VDD (each supply, see Note 3) VDD = 5 V 4.75 5 5.25 V Input voltage, VI, (all inputs except VCOIN1, VCOIN2) 0 VDD V Output current, IO (each output) 0 ±2 mA VCO control voltage at each VCOIN1, VCOIN2 0.9 VDD V Lock frequency (each VCO) ( ×1 output) VDD = 3 V 14 21 MHz Lock frequency, (each VCO) ( ×1 output) VDD = 5 V 22 50 MHz Lock frequency (each VCO) ( ×1/2 output) VDD = 3 V 7 10.5 MHz Lock frequency, (each VCO) ( ×1/2 output) VDD = 5 V 11 25 MHz Bias resistor (each BIAS) RBIAS1 RBIAS2 VDD = 3 V 2.2 3.3 4.3 k Ω Bias resistor, (each BIAS), RBIAS1, RBIAS2 VDD = 5 V 1.5 2.2 3.3 k Ω Operating temperature, TA –20 75 °C NOTE 3: It is recommended that LOGIC VDD1 and VCO VDD1 or LOGIC VDD2 and VCO VDD2 should be at the same voltage and separated from each other. |
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