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4145 Datasheet(PDF) 7 Page - Fairchild Semiconductor

Part # 4145
Description  Electromagnetic Compatibility for Power Converters
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Manufacturer  FAIRCHILD [Fairchild Semiconductor]
Direct Link  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

4145 Datasheet(HTML) 7 Page - Fairchild Semiconductor

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APPLICATION NOTE
AN4145
REV. 1.0 4/6/04
7
Figure 13. Primary Voltage Waveform Without Ringing
Circuitry (C2, R2)
Figure 14. Primary Voltage Waveform with Ringing
Circuitry (C2, R2)
As a first pass, one method of determining the values for
C2 and R2 is as follows:
1.
Determine the frequency of the ringing waveform and
calculate the period.
2.
Multiply the period, determined in Step 1, by 5.
3.
Assume a value for the resistor (usually less than 100R).
4.
Calculate the size of the capacitor by dividing the
number obtained in Step 2 by the size of the resistor
in Step 3.
Note: The advantage of using the resistor R2 and the capac-
itor C2 network is that it reduces the ringing as shown in Fig-
ure 11, but the disadvantage is that the high frequency ripple
passing through capacitor C2 gets dissipated as heat in resis-
tor R2. If noise reduction is more important than efficiency
then proceed, otherwise efficiency will drop off some.
Printed Circuit Board Guidelines
1.
Take the time to place and orient the components
properly.
2.
If heat sinks are used, make sure they are grounded.
3.
A component shield maybe required.
4.
Common mode capacitors should have low ESR values
as well as maintain a short lead length to the ground
place.
5.
If a snubber circuit is being used across the transformer
to slow down the rise time of the MOSFET switch turn-
ing off, make sure that the trace lengths from the drain
and two primary transformer pins are short. If possible
place the snubber circuitry between the two primary
pins.
6.
avoid slots in the ground and power (if used) planes
7.
Under 50 MHz (don’t forget to consider the harmonics
of the PWM controller) traditional decoupling methods
are effective. Use one or two decoupling capacitors
(often 0.1 or 0.01 µF) placed close to the IC power and
ground pins. Consider the loop area formed between the
decoupling capacitor and the IC, and place the capacitor
for minimum loop area.
8.
Keep ground runs as short as possible and as thick and
large as possible.
9.
Avoid sharp corners on traces.
10. Try to group all noisy component in the same area just
in case shielding is required.
11. Use multi-layer printed circuit board if possible.


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