MT352

Data Sheet

11

Zarlink Semiconductor Inc.

1.12

Transmission Parameter Signalling (TPS)

An OFDM frame consists of 68 symbols and a superframe is made up of four such frames. There is a set of TPS

carriers in every symbol and all these carry one bit of TPS. These bits, when combined, include information about

the transmission mode, guard ratio, constellation, hierarchy and code rate, as defined in ETS 300 744. In addition,

the first eight bits of the cell identifier are contained in even frames and the second eight bits of the cell identifier are

in odd frames. The TPS module extracts all the TPS data, and presents these to the host processor in a structured

manner.

1.13

De-Mapper

This module generates soft decisions for demodulated bits using the channel-equalized in-phase and quadrature

components of the data carriers as well as per-carrier channel state information (CSI). The de-mapping algorithm

depends on the constellation (QPSK, 16QAM or 64QAM) and the hierarchy

α = 0, 1, 2 or 3). Soft decisions for both

low- and high-priority data streams are generated.

1.14

Symbol and Bit De-Interleaving

The OFDM transmitter interleaves the bits within each carrier and also the carriers within each symbol. The de-

interleaver modules consist largely of memory to invert these interleaving functions and present the soft decisions

to the FEC in the original order.

1.15

Viterbi Decoder

The Viterbi decoder accepts the 5-bit soft decision data from the OFDM demodulator and outputs a decoded bit-

stream. The decoder does the de-puncturing of the input data for all code rates other than 1/2. It then evaluates the

branch metrics and passes these to a 64-state path-metric updating unit, which in turn outputs a 64-bit word to the

survivor memory. The Viterbi decoded bits are obtained by tracing back the survivor paths in this memory. A trace-

back depth of 128 is used to minimize any loss in performance, especially at high code rates.

The decoder re-encodes the decoded bits and compares these with received data (delayed) to compute bit errors

at its input, on the assumption that the Viterbi output BER is significantly lower than its input BER.

1.16

MPEG Frame Aligner

The Viterbi decoded bit stream is aligned into 204-byte frames. A robust synchronization algorithm is used to

ensure correct lock and to prevent loss of lock due to noise impulses.

1.17

De-interleaver

Errors at the Viterbi output occur in bursts and the function of the de-interleaver is to spread these errors over a

number of 204-byte frames to give the Reed-Solomon decoder a better chance of correcting these. The de-

interleaver is a memory unit which implements the inverse of the convolutional interleaving function introduced by

the transmitter.

1.18

Reed-Solomon Decoder

Every 188-byte transport packet is encoded by the transmitter into a 204-byte frame, using a truncated version of a

systematic (255,239) Reed-Solomon code. The corresponding (204,188) Reed-Solomon decoder is capable of

correcting up to eight byte errors in a 204-byte frame. It may also detect frames with more than eight byte errors. In

addition to efficiently performing this decoding function, the Reed-Solomon decoder in MT352 keeps a count of the

number of bit errors corrected over a programmable period and the number of uncorrectable blocks. This

information can be used to compute the post-Viterbi BER.