UCC2817A, UCC2818A

UCC3817A, UCC3818A

SLUS577C − SEPTEMBER, 2003 − REVISED MARCH 2009

7

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Pin Descriptions (cont.)

IAC: This input to the analog multiplier is a current proportional to instantaneous line voltage. The multiplier

MOUT: The output of the analog multiplier and the inverting input of the current amplifier are connected together

at MOUT. As the multiplier output is a current, this is a high-impedance input so the amplifier can be configured

as a differential amplifier. This configuration improves noise immunity and allows for the leading-edge

modulation operation. The multiplier output current is limited to 2

I

by the equation:

I

I

IAC

(V

V

VFF

2

K

where K

+ 1

V

is the multiplier gain constant.

OVP/EN: A window comparator input that disables the output driver if the boost output voltage is a programmed

level above the nominal or disables both the PFC output driver and resets SS if pulled below 1.9 V (typ).

PKLMT: The threshold for peak limit is 0 V. Use a resistor divider from the negative side of the current sense

resistor to VREF to level shift this signal to a voltage level defined by the value of the sense resistor and the

peak current limit. Peak current limit is reached when PKLMT voltage falls below 0 V.

RT: A resistor from RT to GND is used to program oscillator charging current. A resistor between 10 k

Ω and

100 k

Ω is recommended. Nominal voltage on this pin is 3 V.

source. This voltage is used as the voltage error signal during start-up, enabling the PWM duty cycle to increase

the PWM.

Note: In an open-loop test circuit, grounding the SS pin does not ensure 0% duty cycle. Please see the

application section for details.

VAOUT: This is the output of the operational amplifier that regulates output voltage. The voltage amplifier output

is internally limited to approximately 5.5 V to prevent overshoot.

VCC: Connect to a stable source of at least 20 mA between 10 V and 17 V for normal operation. Bypass VCC

directly to GND to absorb supply current spikes required to charge external MOSFET gate capacitances. To

under-voltage lockout voltage threshold and remains above the lower threshold.

At low line, the VFF voltage should be 1.4 V.

VSENSE: This is normally connected to a compensation network and to the boost converter output through a

divider network.

VREF: VREF is the output of an accurate 7.5-V voltage reference. This output is capable of delivering 20 mA

to peripheral circuitry and is internally short-circuit current limited. VREF is disabled and remains at 0 V when

stability. Please refer to Figures 8 and 9 for VREF line and load regulation characteristics.