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TMS34094 Datasheet(PDF) 1 Page - Texas Instruments |
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TMS34094 Datasheet(HTML) 1 Page - Texas Instruments |
1 / 38 page TMS34094 ISA BUS INTERFACE SPVS006A – FEBRUARY 1992 – REVISED JUNE 1992 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 1 Copyright © 1992, Texas Instruments Incorpo- rated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. • Simplifies Design of High-Performance ISA PC Graphics Systems • Single-Integrated Circuit Interfaces TMS34020 to ISA Bus • Conforms to ISA Portions of the EISA Rev. 3.11 Specifications • Internal Data Bus Transceivers • Register Configurable I/O Mapped or Memory-Mapped Interface • Register Configurable as an 8- or 16-Bit ISA Memory-Mapped Device • Configurable TMS34020 Address Space Decoding – VRAM Shift Register Transfer Decoding – VRAM Mask Write and VRAM Color Register Write Access Decoding • VGA Passthrough Support • Operating Free-Air Temperature ... 0 °C to 55°C description The TMS34094 ISA Bus Interface device, a peripheral device for the TMS34020 Graphics Processor, facilitates the design of a high-performance graphics system for use in an ISA Bus-compatible PC. The device decodes ISA Bus cycles and controls the TMS34020 host interface to enable read and write accesses to the TMS34020’s local memory. In addition, the TMS34094 allows the host to access the TMS34020’s local memory via either I/O-mapped or memory-mapped ISA Bus accesses. The capability is software configurable, simplifying design and reducing system cost. I/O mapped interface The I/O mapped interface defines three I/O locations which facilitate access to the entire range of TMS34020 local memory. Two registers are used together to provide a 28-bit address to the TMS34020. The third register acts as the data port between the ISA Bus and TMS34020 local memory. This set of three registers supports the TMS34020’s autoincrement modes which reduce data transfer overhead. For simplifying interrupt routines, the TMS34094 also provides read back of the address for the next host access. memory-mapped interface The memory-mapped interface provides four highly configurable windows between host memory space and TMS34020 memory space. Each window has four individually configurable attributes. These include: response as either an 8-bit or 16-bit device; begin address in the memory map of the host; begin address in the memory map of the TMS34020; and size. Size may range from 8K bytes to 4M bytes. 1 40 160 121 41 80 120 81 160-PIN PC PLASTIC QUAD-FLAT PACKAGE (EIAJ) (TOP VIEW) |
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