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TMX320DM6443CZWT Datasheet(PDF) 10 Page - Texas Instruments |
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TMX320DM6443CZWT Datasheet(HTML) 10 Page - Texas Instruments |
10 / 219 page TMS320DM6443 SPRS282G – DECEMBER 2005 – REVISED AUGUST 2010 www.ti.com TMS320DM6443 Revision History (continued) SEE ADDITIONS/MODIFICATIONS/DELETIONS Table 6-55, Switching Characteristics Over Recommended Operating Conditions for VPBE Control and Data Output With Respect to VCLK: • Updated/changed PARAMETER NO. 22 to "Delay time, VCLKIN low to VCLK low". [Cleared Documentation Feedback Issue] • Updated/changed "VCLKIN = PCLK or VPBECLK" footnote to "VCLKIN = VPBECLK" Figure 6-49, VPBE Control and Data Output Timing With Respect to VCLK: • Updated/changed "VCLKIN = PCLK or VPBECLK" footnote to "VCLKIN = VPBECLK" Section 6.13.2.4 • Updated/changed "The DM6443's analog video DAC outputs ..." paragraph. [Cleared Documentation DAC Electrical Feedback Issue] Data/Timing Section 6.25 • Updated/changed the "TRST only needs to be released when it is necessary to use ..." paragraph. IEEE 1149.1 JTAG [Cleared Documentation Feedback Issue] • Added "Note:" to the end of Section 6.25 Section 6.25.1 • Updated/changed "The JTAG ID register is a read-only register ..." paragraph JTAG Peripheral Figure 6-74, JTAG ID Register Description - DM6443 Register Value - 0xXB70 002F: Register Description(s) – JTAG ID Register • Updated/changed footnote Table 6-106, JTAG ID Register Selection Bit Descriptions: • Updated/changed DESCRIPTION of Bits 31:28 (VARIANT) 10 Contents Copyright © 2005–2010, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM6443 |
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