TMS28F020

262144 BY 8 BIT

FLASH MEMORY

SMJS020C − OCTOBER 1994 − REVISED JANUARY 1998

7

POST OFFICE BOX 1443

command definitions

read command

register invokes the read operation. When the device is powered up, the default contents of the command

register are 00h and the read operation is enabled. The read operation remains enabled until a different valid

command is written to the command register.

algorithm-selection-mode command

The

algorithm-selection

mode

is

activated

by

writing

90h

into

the

command

register.

The

manufacturer-equivalent code (89h) is identified by the value read from address location 00000h, and the

device-equivalent code (BDh) is identified by the value read from address location 00001h.

set-up-erase/erase commands

write the set-up-erase command, 20h, into the command register. Writing a second erase command, 20h, into

the command register invokes the erase operation. The erase operation begins on the rising edge of W and ends

on the rising edge of the next W. The erase operation requires 10 ms to complete before the erase-verify

command, A0h, can be loaded.

Maximum erase timing is controlled by the internal stop timer. When the stop timer terminates the erase

operation, the device enters an inactive state and remains inactive until a command is received.

erase-verify command

All bytes must be verified following an erase operation. After the erase operation is complete, an erased byte

can be verified by writing the erase-verify command, A0h, into the command register. This command causes

the device to exit the erase mode on the rising edge of W. The address of the byte to be verified is latched on

the falling edge of W. The erase-verify operation remains enabled until a command is written to the command

register.

To determine whether or not all the bytes have been erased, the TMS28F020 applies a margin voltage to each

byte. If FFh is read from the byte, all bits in the designated byte have been erased. The erase-verify operation

continues until all of the bytes have been verified. If FFh is not read from a byte, an additional erase operation

must be executed. Figure 1 shows the combination of commands and bus operations for electrically erasing

the TMS28F020.

set-up-program/program commands

programming mode, write the set-up-program command, 40h, into the command register. The programming

operation is invoked by the next write-enable pulse. Addresses are latched internally on the falling edge of W,

and data is latched internally on the rising edge of W. The programming operation begins on the rising edge

of W and ends on the rising edge of the next W pulse. The program operation requires 10

µs for completion

before the program-verify command, C0h, can be loaded.

Maximum program timing is controlled by the internal stop timer. When the stop timer terminates the program

operation, the device enters an inactive state and remains inactive until a command is received.