A1454

11

Allegro MicroSystems, LLC

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

EEPROM Memory Check

The EEPROM Memory Check provides the capability to vary

the EEPROM reference voltages and compare the data from each

reference voltage, to ensure that no EEPROM memory cells are

corrupted. A high reference voltage is used ensure that 1’s are

correctly programmed and a low reference voltage is used to

ensure that the 0’s are correctly programmed.

The Tables 6 and 7 describe the features available in customer

accessible register EEPROM Check.

Table 6: Customer Accessible Register EEPROM Check

Register Name

Register Address

Bit Number

25:6

EEPROM Check

0x1C

Unused

MM

MS

0

0

MCI

Table 7: Customer Accessible Register EEPROM Check

Parameter Name

Description

Value

MCI: Memory Check Initiate

The MCI bit can be written by the customer to

initiate an EEPROM memory check procedure.

This bit will self-clear upon completion of the

memory test.

0: Reset Condition

1: Start Memory Check

Bit 1

Must be set to ‘0’

0

Bit 2

Must be set to ‘0’

0

MS[1:0]: Memory Status

These are status bits that provide information on

the progress and result of the Memory Check.

These bits are cleared after a read, or a system

reset.

00: Reset Condition

01: Pass - No failure detected.

10: Fail – Failure detected

11: Running - Memory Check ongoing.

MM

In the case of MS [1:0] = [10], i.e. failure

detected, MM will provide additional diagnostic

information, indicating whether the failing

memory reference was the low reference, or the

high reference.

0: Low Reference Failed

1: High Reference Failed