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OPA322AIDBVR Datasheet(PDF) 4 Page - Texas Instruments |
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OPA322AIDBVR Datasheet(HTML) 4 Page - Texas Instruments |
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4 / 38 page  OPA322, OPA322S OPA2322, OPA2322S OPA4322, OPA4322S SBOS538E – JANUARY 2011 – REVISED JUNE 2012 www.ti.com ELECTRICAL CHARACTERISTICS: VS = +1.8 V to +5.5 V, or ±0.9 V to ±2.75 V (continued) Boldface limits apply over the specified temperature range, TA = –40°C to +125°C. At TA = +25°C, RL = 10 kΩ connected to VS/2, VCM = VS/2, VOUT = VS/2, and SHDN_x = VS+, unless otherwise noted. OPA322, OPA322S, OPA2322, OPA2322S, OPA4322, OPA4322S PARAMETER TEST CONDITIONS MIN TYP MAX UNIT OUTPUT Voltage output swing from VO RL = 10 kΩ 10 20 mV both rails Over temperature RL = 10 kΩ 30 mV Short-circuit current ISC VS = 5.5 V ±65 mA Capacitive load drive CL See Typical Characteristics Open-loop output resistance RO IO = 0 mA, f = 1 MHz 90 Ω POWER SUPPLY Specified voltage range VS 1.8 5.5 V Quiescent current per amplifier IQ IO = 0 mA, VS = +5.5 V OPA322, OPA322S IO = 0 mA, VS = +5.5 V 1.6 1.9 mA Over temperature IO = 0 mA, VS = +5.5 V 2 mA OPA2322, OPA2322S IO = 0 mA, VS = +5.5 V 1.5 1.75 mA Over temperature IO = 0 mA, VS = +5.5 V 1.85 mA OPA4322, OPA4322S IO = 0 mA, VS = +5.5 V 1.4 1.65 mA Over temperature IO = 0 mA, VS = +5.5 V 1.75 mA Power-on time VS+ = 0 V to 5 V, to 90% IQ level 28 μs SHUTDOWN(2) VS = 1.8 V to 5.5 V Quiescent current, per amplifier IQSD All amplifiers disabled, SHDN = VS– 0.1 0.5 µA High voltage (enabled) VIH Amplifier enabled (V+) - 0.1 V Low voltage (disabled) VIL Amplifier disabled (V-) + 0.1 V Amplifier enable time (full tON Full shutdown; G = 1, VOUT = 0.9 × VS/2 (4) 10 µs shutdown)(3) Amplifier enable time (partial tON Partial shutdown; G = 1, VOUT = 0.9 × VS/2 (4) 6 µs shutdown) (3) Amplifier disable time(3) tOFF G = 1, VOUT = 0.1 × VS/2 3 µs VIH = 5.0 V 0.13 µA SHDN pin input bias current (per pin) VIL = 0 V 0.04 µA TEMPERATURE Specified range –40 +125 °C Operating range –40 +150 °C (2) Ensured by design and characterization; not production tested. (3) Disable time (tOFF) and enable time (tON) are defined as the time interval between the 50% point of the signal applied to the SHDN pin and the point at which the output voltage reaches the 10% (disable) or 90% (enable) level. (4) Full shutdown refers to the dual OPA2322S having both channels A and B disabled (SHDN_A = SHDN_B = VS–) and the quad OPA4322S having all channels A to D disabled (SHDN_A/B = SHDN_C/D = VS–). For partial shutdown, only one SHDN pin is exercised; in this mode, the internal biasing and oscillator remain operational and the enable time is shorter. 4 Submit Documentation Feedback Copyright © 2011–2012, Texas Instruments Incorporated Product Folder Link(s): OPA322 OPA322S OPA2322 OPA2322S OPA4322 OPA4322S |
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