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OPA358AIDCKT Datasheet(PDF) 7 Page - Texas Instruments |
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OPA358AIDCKT Datasheet(HTML) 7 Page - Texas Instruments |
7 / 18 page OPA358 SB0S296C − MARCH 2004 − REVISED FEBRUARY 2005 www.ti.com 7 APPLICATIONS INFORMATION OPERATING VOLTAGE The OPA358 is fully specified from +2.7V to +3.3V over a temperature range of −40 °C to +85°C. Parameters that vary significantly with operating voltages or temperature are shown in the Typical Characteristics. Power-supply pins should be bypassed with a 100nF ceramic capacitor. INPUT VOLTAGE The input common-mode range of the OPA358 extends from (V−) − 0.1V to (V+) − 1.0V. INPUT OVER-VOLTAGE PROTECTION All OPA358 pins are static-protected with internal ESD protection diodes connected to the supplies. These diodes will provide input overdrive protection if the current is externally limited to 10mA. RAIL-TO-RAIL OUTPUT A class AB output stage with common-source transistors is used to achieve rail-to-rail output. For a 150 Ω load, the output voltage swing is 100mV from the negative rail and 200mV from the positive rail when the load is connected to VS/2. For lighter loads, the output swings significantly closer to the supply rails while maintaining high open-loop gain. If the load is connected to ground, the OPA358 output typically swings to within 5mV of ground. See the typical characteristic curve, Output Voltage Swing vs Output Current. ENABLE/SHUTDOWN The OPA358 has a shutdown feature that disables the output and reduces the quiescent current to less than 5 µA. This feature is especially useful for portable video applications such as digital still cameras (DSCs) and camera phones, where the equipment is infrequently connected to a TV or other video device. The Enable logic input voltage is referenced to the OPA358 GND pin. A logic level HIGH applied to the enable pin enables the op amp. A valid logic HIGH is defined as ≥ 1.6V above GND. A valid logic LOW is defined as ≤ 0.8V above GND. If the Enable pin is not connected, internal pull-up circuitry will enable the amplifier. Enable pin voltage levels are tested for a valid logic HIGH threshold of 1.6V minimum and a valid logic LOW threshold of 0.8V maximum. The enable time is 1.5 µs and the disable time is only 50ns. This allows the output of the OPA358 to be multiplexed onto a common output bus. When disabled, the output assumes a high-impedance state. 100nF 1k Ω 1k Ω V OUT 75 Ω 75 Ω Television +3V V IN Figure 1. Typical Circuit Using the OPA358 in a Gain = 2 Configuration |
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