x

870 m

1

2

3

6

8

4

7

5

14

13

12

16

9

10

15

18

11

8551T

17

20 19

ONET8551T

www.ti.com

SLLSEI5 – OCTOBER 2013

CHIP DIMENSIONS AND PAD LOCATIONS

Figure 5. Die Thickness: 203 ±13

μm, Pad Dimensions: 105 μm x 65 μm, and Die Size: 870 ±40 μm x 1036

±40

μm

COORDINATES (Referenced to Pad 1)

PAD

SYMBOL

TYPE

DESCRIPTION

x (

μm)

y (

μm)

1

0

0

GND

Supply

Circuit ground

2

0

–115

OUT+

Analog output

Non-inverted data output

3

0

–230

GND

Supply

Circuit ground

4

0

–460

VCC_OUT

Supply

3.3-V supply voltage

5

0

–575

VCC_IN

Supply

3.3-V supply voltage

6

116

–728

GND

Supply

Circuit ground

7

226

–728

FILTER1

Analog output

Bias voltage for photodiode

8

336

–728

IN

Analog input

Data input to TIA

9

446

–728

FILTER2

Analog output

Bias voltage for photodiode

10

556

–728

GND

Supply

Circuit ground

11

666

–728

NC

No connect

Do not connect

12

671

–575

RSSI_IB

Analog output

RSSI output signal for internally biased receivers

13

671

–460

RSSI_EB

Analog output

RSSI output signal for externally biased receivers

14

671

–230

GND

Supply

Circuit ground

15

671

–115

OUT–

Analog output

Inverted data output

16

671

0

GND

Supply

Circuit ground

17

508

109

BW1

Digital input

Bandwidth adjustment

18

393

109

GND

Supply

Circuit ground

19

278

109

GND

Supply

Circuit ground

20

163

109

BW0

Digital input

Bandwidth adjustment

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