TPS3702

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SBVS251 – JANUARY 2015

7.3 Feature Description

7.3.1 Input (SENSE)

The TPS3702 combines two comparators with a precision reference voltage and a trimmed resistor divider. Only

a single external input is monitored by the two comparators because the resistor divider is internal to the device.

This configuration optimizes device accuracy because all resistor tolerances are accounted for in the accuracy

and performance specifications. Both comparators also include built-in hysteresis that provides some noise

immunity and ensures stable operation.

The SENSE input can vary from ground to 6.5 V (7.0 V, absolute maximum), regardless of the device supply

voltage used. Although not required in most cases, for noisy applications good analog design practice is to place

a 1-nF to 10-nF bypass capacitor at the SENSE input in order to reduce sensitivity to transient voltages on the

monitored signal.

For the undervoltage comparator, the undervoltage output is driven to logic low when the SENSE voltage drops

For the overvoltage comparator, the overvoltage output is driven to logic low when the voltage at SENSE

Figure 1. Together, these two comparators form a window-detection function as described in the Window

Comparator Considerations section. Also see the Device Nomenclature section.

7.3.2 Outputs (UV, OV)

In a typical TPS3702 application, the outputs are connected to a reset or enable input of a processor [such as a

digital signal processor (DSP), application-specific integrated circuit (ASIC), or other processor type] or the

outputs are connected to the enable input of a voltage regulator [such as a dc-dc converter or low-dropout

regulator (LDO)].

The TPS3702 provides two open-drain outputs (UV and OV) and uses pull-up resistors to hold these lines high

when the output goes to a high-impedance state. Connect the pull-up resistors to the proper voltage rails to

enable the outputs to be connected to other devices at the correct interface voltage levels. The TPS3702 outputs

can be pulled up to 18 V, independent of the device supply voltage. To ensure proper voltage levels, give some

Characteristics table. Use wired-OR logic to merge the undervoltage and overvoltage signals into one logic signal

that goes low if either outputs are asserted because of a fault condition.

Table 1 describes how the outputs are either asserted low or high impedance. See Figure 1 for a timing diagram

that describes the relationship between the threshold voltages and the respective output.

7.3.3 User-Configurable Accuracy Band (SET)

The TPS3702 has an innovative feature allowing each device to be set for one of two accuracy bands, Table 3

describes the available accuracy bands with nominal thresholds ranging from ±2% to ±10% of the monitored rail

thresholds for the tighter window whereas forcing the voltage on the SET pin below the low-level SET pin input

Figure 15). Thus, when the positive-going and negative-going threshold accuracy is accounted for, the device

outputs an active low signal for voltage excursions outside a ±4.9% band (worst case), which is calculated by

taking the nominal threshold percentage for that given part number and adding that value to the threshold

±9% and the device outputs an active low signal for voltage excursions outside the ±9.9% band (worst case).

The ability for the user to change the accuracy band allows a system to programmatically change the accuracy

band during certain conditions. One example is during system start up when the monitored voltage can be

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