5

TPS548D21

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SLUSCI8 – JULY 2016

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Copyright © 2016, Texas Instruments Incorporated

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.

6.4 Thermal Information

TPS548D21

UNIT

RVF (QFN)

(40 PINS)

Junction-to-ambient thermal resistance

28.5

°C/W

Junction-to-case (top) thermal resistance

18.3

°C/W

Junction-to-board thermal resistance

3.6

°C/W

Junction-to-top characterization parameter

0.96

°C/W

Junction-to-board characterization parameter

3.6

°C/W

Junction-to-case (bottom) thermal resistance

0.6

°C/W

(1)

Specified by design. Not production tested.

6.5 Electrical Characteristics

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

High-side FET

2.9

mΩ

Low-side FET

1.2

mΩ

INPUT SUPPLY AND CURRENT

VDD supply voltage

Nominal VDD voltage range

4.5

22

V

VDD bias current

No load, power conversion enabled (no switching),

2.0

mA

VDD standby current

700

µA

UNDERVOLTAGE LOCKOUT

VDD UVLO rising threshold

4.25

V

VDD UVLO hysteresis

0.2

V

EN_UVLO on threshold

1.45

1.6

1.75

V

EN_UVLO hysteresis

270

300

340

mV

EN_UVLO input leakage

current

–1

0

1

µA

INTERNAL REFERENCE VOLTAGE AND EXTERNAL REFIN TRACKING RANGE

Internal REF voltage

900.4

mV

Internal REF voltage

tolerance

–40°C

–0.5%

0.5%

Internal REF voltage range

0.6

1.2

V

External REFIN voltage range

0

1.25

V

External REFIN margin range

0.5

1.25

V

REFIN_TRK voltage range

0

3.3

V

OUTPUT VOLTAGE

Loop comparator input offset

–2.5

2.5

mV

RSP input current

–1

1

µA

VO discharge current

8

12

mA

DIFFERENTIAL REMOTE SENSE AMPLIFIER

5

7

MHz

75

dB

SR

±4.7

V/µsec

–0.2

1.8

V

–3.5

3.5

mV

INTERNAL BOOT STRAP SWITCH

Forward voltage

0.1

0.2

V

VBST leakage current

0.01

1.5

µA