TPS54116-Q1 datasheet(5/41 Pages) TI1

Part #	TPS54116-Q1

Description	2.95-V to 6-V Input, 4-A Step-Down Converter and 1-A Source/Sink DDR Termination Regulator

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TPS54116-Q1

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SLVSCO3A – AUGUST 2016 – REVISED AUGUST 2016

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6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

MAX

UNIT

V(AVIN), V(PVIN)

Input voltage

2.95

6

V

VOUT

Buck output voltage

0.6

4.5

V

IOUT

Buck output current

0

4

A

V(VDDQSNS)

VDDQSNS input voltage

1

3.5

V

V(LDOIN)

LDOIN input voltage

VTT + VDO

3.5

V

V(VTT), V(VTTREF)

VTT and VTTREF output voltage

0.5

3.5

V

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report.

6.4 Thermal Information

THERMAL METRIC(1)

TPS54116-Q1

UNIT

RTW (WQFN)

24 PINS

RθJA

Junction-to-ambient thermal resistance

36.2

°C/W

RθJC(top)

Junction-to-case (top) thermal resistance

35.0

RθJB

Junction-to-board thermal resistance

14.3

ψJT

Junction-to-top characterization parameter

0.4

ψJB

Junction-to-board characterization parameter

14.4

RθJC(bot)

Junction-to-case (bottom) thermal resistance

4.6

6.5 Electrical Characteristics

TJ = -40°C to 150°C, AVIN = PVIN = 2.95 V to 6 V, VLDOIN = VDDQSNS (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

SUPPLY VOLTAGE (AVIN and PVIN PINS)

AVIN and PVIN operating

2.95

6

V

AVIN internal UVLO threshold

AVIN rising

2.7

2.8

V

AVIN internal UVLO hysteresis

0.05

0.12

V

Iq shutdown

V(ENSW) = V(ENLDO) = 0 V, V(VDDQSNS) = 1.8

V, TJ = 25°C

1

3.5

µA

Iq operating — LDO and buck enabled

V(ENSW) = V(ENLDO) = V(AVIN) = 5 V, V(FB) =

0.7 V, V(VDDQSNS) = 1.8 V, TJ = 25°C

650

800

µA

Iq operating — LDO enabled, buck

disabled

V(ENLDO) = V(AVIN) = 5 V, V(ENSW) = 0 V,

V(VDDQSNS) = 1.8 V, TJ = 25°C

190

300

µA

Iq operating — LDO disabled, buck

enabled

V(ENSW) = V(AVIN) = 5 V, V(ENLDO) = 0 V,

V(FB) = 0.7 V, V(VDDQSNS) = 1.8 V, TJ =

25°C

570

700

µA

ENABLE (ENSW and ENLDO PINS)

VENRISING

ENLDO rising threshold

ENLDO voltage ramping up

1.20

V

VENFALLING

ENLDO falling threshold

ENLDO voltage ramping down

1.17

ENLDO input current above voltage

threshold

V(ENLDO) = Enable threshold + 50 mV

-4.4

µA

Ip

ENLDO input current below voltage

threshold

V(ENLDO) = Enable threshold - 50 mV

-1.7

Ih

ENLDO hysteresis current

-2.7

VENRISING

ENSW rising threshold

ENSW voltage ramping up

1.20

V

VENFALLING

ENSW falling threshold

ENSW voltage ramping down

1.17

ENSW input current above voltage

threshold

V(ENSW) = Enable threshold + 50 mV

-4.4

µA

Ip

ENSW input current below voltage

threshold

V(ENSW) = Enable threshold - 50 mV

-1.7

Ih

ENSW hysteresis current

-2.7

Input current above voltage threshold with

ENLDO and ENSW connected

V(ENLDO) = V(ENSW) = Enable threshold +

50 mV

-8.5

µA

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