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TPS54122RHLR Datasheet(PDF) 6 Page - Texas Instruments

Part # TPS54122RHLR
Description  Dual-Output, 3-A, QuietSupply With Integrated DC-DC Converter and Low-Noise LDO
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TPS54122RHLR Datasheet(HTML) 6 Page - Texas Instruments

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TPS54122
SBVS221B – NOVEMBER 2013 – REVISED AUGUST 2016
www.ti.com
Product Folder Links: TPS54122
Submit Documentation Feedback
Copyright © 2013–2016, Texas Instruments Incorporated
Electrical Characteristics (continued)
at TJ = –40°C to +125°C, VBIAS = VVIN = 5 V, VLDOIN = DC-DC_OUT
(1) = 2.1 V, V
LDOEN = 1.1 V, VO = 1.8 V, IO = 50 mA, VEN =
floating, and COUT = 10.0 μF, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
DC-DC POWER GOOD (PWRGD PIN)
VSENSE pin threshold
VSENSE falling (fault)
0.91 Vref
V
VSENSE rising (good)
0.93 Vref
V
VSENSE rising (fault)
1.07 Vref
V
VSENSE falling (good)
1.05 Vref
V
High-level output leakage current
VVSENSE = Vref, VPWRGD = 5.5 V, VEN = 3 V
2
nA
Low-level output voltage
IPWRGD = 3 mA
0.3
0.6
V
Minimum VIN voltage for valid output
VPWRGD < 0.5 V at 100 µA
1.2
1.6
V
LDO
VLDOIN
LDO input voltage range
VO + VDO
5.5
V
VBIAS
LDO bias input voltage range
2.375
5.5
V
VFB
FB pin voltage
TA = 25°C
0.796
0.8
0.804
V
VO
OUT pin voltage range
VFB
3.6
V
OUT pin voltage accuracy
VO = VFB, 50 mA ≤ IO < 3 A,
2.97 V
≤ VBIAS ≤ 5.25 V,
VLDOIN ≥ VOUT(nom) + 0.3 V,
VBIAS ≥ VOUT(nom) + 1.62 V
–1.0%
±0.2%
1.0%
ΔVO(ΔIL)
Load regulation
0 mA
≤ IOUT ≤ 50 mA
0.013
%/mA
50 mA
≤ IOUT ≤ 3 A
0.03
%/A
ΔVO(ΔVI)
Line regulation
VOUT(nom) + 0.3 V ≤ VLDOIN ≤ 5.5 V
0.0005
0.06
%/V
VDO(LDOIN)
VLDOIN dropout voltage
IO ≤ 3.0 A, VBIAS – VOUT(nom) ≥ 1.62 V
100
200
mV
VDO(BIAS)
VBIAS dropout voltage
IO ≤ 3.0 A, VLDOIN = VBIAS
1.62
V
ILIM
Output current limit
VO = 0.8 × VOUT(nom)
3.8
6.0
A
IBIAS
BIAS pin current
2
4
mA
ISD(LDO)
Shutdown current (IBIAS)
VEN < 0.4 V
1
100
µA
IFB
FB pin current
–250
95
250
nA
ILDOEN
LDOEN pin input current
VEN = 5 V
0.1
1
µA
VIL(LDOEN)
LDOEN pin low-level input voltage
(disable)
0.4
V
VIH(LDOEN)
LDOEN pin high-level input voltage
(enable)
1.1
V
PG pin trip threshold
VFB decreasing
0.86 VFB
0.90 VFB
0.94 VFB
V
PG pin trip hysteresis
0.03 VFB
V
High-level output leakage current
VPG = 5.25 V
0.03
1
µA
Low-level output voltage
IPG = 1 mA
0.3
V
INR
NR pin charging current
VNR = 0.4 V
0.5
0.73
1
µA
THERMAL SHUTDOWN
Tsd
Thermal shutdown temperature
Shutdown, temperature increasing
160
°C
Reset, temperature decreasing
140
°C
NOISE
Vn
Output noise voltage
BW = 10 Hz to 1 MHz, CNR = 10 µF,
CFB = 0.1 µF, IO = 1 A , COUT = 100 µF
17
µVRMS


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