C6(nF) x V

x 1.1

C6(nF) x 0.765 x 1.1

REF

t

(ms) =

=

SS

I

( A)

2

SS

m

(

)

(

)

2

1

-

×

=

=

× ×

IN

OUT

OUT

OUT LL

IN

V

V

V

I

L fsw

V

9

TPS54328

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SLVSAN2D – NOVEMBER 2010 – REVISED AUGUST 2016

Product Folder Links: TPS54328

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Copyright © 2010–2016, Texas Instruments Incorporated

Feature Description (continued)

At the beginning of each cycle, the high-side MOSFET is turned on. This MOSFET is turned off after internal one

maintain a pseudo-fixed frequency over the input voltage range, hence it is called adaptive on-time control. The

one-shot timer is reset and the high-side MOSFET is turned on again when the feedback voltage falls below the

reference voltage. An internal ramp is added to reference voltage to simulate output ripple, eliminating the need

for ESR induced output ripple from D-CAP2 mode control.

7.3.2 PWM Frequency and Adaptive On-Time Control

TPS54328 uses an adaptive on-time control scheme and does not have a dedicated onboard oscillator. The

TPS54328 runs with a pseudo-constant frequency of 700 kHz by using the input voltage and output voltage to

set the on-time one-shot timer. The on-time is inversely proportional to the input voltage and proportional to the

7.3.3 Auto-Skip Eco-Mode Control

The TPS54328 is designed with Auto-Skip Eco-Mode to increase light load efficiency. As the output current

decreases from heavy load condition, the inductor current is also reduced and eventually comes to point that its

rippled valley touches zero level, which is the boundary between continuous conduction and discontinuous

conduction modes. The rectifying MOSFET is turned off when its zero inductor current is detected. As the load

current further decreases the converter run into discontinuous conduction mode. The on-time is kept almost the

same as is was in the continuous conduction mode so that it takes longer time to discharge the output capacitor

with smaller load current to the level of the reference voltage. The transition point to the light load operation

(1)

7.3.4 Soft Start and Pre-Biased Soft Start

The soft start function is adjustable. When the EN pin becomes high, 2-µA current begins charging the capacitor

which is connected from the SS pin to GND. Smooth control of the output voltage is maintained during start up.

The equation for the slow start time is shown in Equation 2. VFB voltage is 0.765 V and SS pin source current is

2 µA.

(2)

The TPS54328 contains a unique circuit to prevent current from being pulled from the output during startup if the

output is pre-biased. When the soft-start commands a voltage higher than the pre-bias level (internal soft start

the first low side FET gate driver pulses with a narrow on-time. It then increments that on-time on a cycle-by-

cycle basis until it coincides with the time dictated by (1-D), where D is the duty cycle of the converter. This

into regulation and the control loop is given time to transition from pre-biased start-up to normal mode operation.

7.3.5 Current Protection

The output over-current protection (OCP) is implemented using a cycle-by-cycle valley detect control circuit. The

switch current is monitored by measuring the low-side FET switch voltage between the SW pin and GND. This

voltage is proportional to the switch current. To improve accuracy, the voltage sensing is temperature

compensated.

monitors the low-side FET switch voltage, which is proportional to the switch current, during the low-side on-time.

If the measured voltage is above the voltage proportional to the current limit, an internal counter is incremented

per each SW cycle and the converter maintains the low-side switch on until the measured voltage is below the

voltage corresponding to the current limit at which time the switching cycle is terminated and a new switching