TPS56100

HIGHEFFICIENCY DSP POWER SUPPLY CONTROLLER

FOR 5V INPUT SYSTEMS

SLVS201A − JUNE 1999 − REVISED JULY 1999

7

POST OFFICE BOX 655303

detailed description (continued)

overcurrent protection

The overcurrent protection (OCP) circuit monitors the current through the high-side FET. The overcurrent

threshold is adjustable with an external resistor divider between IOUT and ANAGND, with the divider voltage

connected to the OCP pin. If the voltage on OCP exceeds 100 mV, then a fault latch is set and the output drivers

3.6 V or INHIBIT is similarly brought below its stop threshold and back above its start threshold. A 3-

µs deglitch

timer is included for noise immunity. The OCP circuit is also designed to protect the high-side power FET against

a short-to-ground fault on the terminal common to both power FETs.

LODRV

The LODRV circuit is designed to protect the microprocessor against overvoltages that can occur if the high-side

power FETs become shorted. External components sensing an overvoltage condition are required to use this

feature. When an overvoltage fault occurs, the low-side FETs are used as a crowbar. LODRV is pulled low and

the low-side FET will be turned on, overriding all control signals inside the TPS5210 controller. The crowbar

action will short the input supply to ground through the faulted high-side FETs and the low-side FETs. A fuse

Table 1. Voltage Programming Codes

VP TERMINALS

(0 = GND, 1 = floating or pull-up to 5 V)

VREF

VP4

VP3

VP2

VP1

VP0

(Vdc)

0

1

1

1

1

1.30

0

1

1

1

0

1.35

0

1

1

0

1

1.40

0

1

1

0

0

1.45

0

1

0

1

1

1.50

0

1

0

1

0

1.55

0

1

0

0

1

1.60

0

1

0

0

0

1.65

0

0

1

1

1

1.70

0

0

1

1

0

1.75

0

0

1

0

1

1.80

0

0

1

0

0

1.85

0

0

0

1

1

1.90

0

0

0

1

0

1.95

0

0

0

0

1

2.00

0

0

0

0

0

2.05

1

1

1

1

1

No CPU

1

1

1

1

0

2.10

1

1

1

0

1

2.20

1

1

1

0

0

2.30

1

1

0

1

1

2.40

1

1

0

1

0

2.50

1

1

0

0

1

2.60