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TPS56300PWPG4 Datasheet(PDF) 5 Page - Texas Instruments |
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TPS56300PWPG4 Datasheet(HTML) 5 Page - Texas Instruments |
5 / 40 page TPS56300 DUALOUTPUT LOW INPUT VOLTAGE DSP POWER SUPPLY CONTROLLER WITH SEQUENCING SLVS261B − DECEMBER 1999 − SEPTEMBER 2000 5 www.ti.com Terminal Functions (continued) TERMINAL I/O DESCRIPTION NAME NO. I/O DESCRIPTION IOUT 26 Current signal output. Output voltage on this pin is proportional to the load current as measured across the high-side FETs on-resistance. The voltage on this pin equals 2 × RON × IOUT, where Ron is the equivalent on-resistance of the high-side FETs OCP 27 Over current protection. Current limit trip point for ripple regulator is set with a resistor divider between IOUT pin and ANAGND. DROOP 28 Droop voltage. Voltage input used to set the amount of output voltage droop as a function of load current. The amount of droop compensation is set with a resistor divider between the IOUT pin and ANAGND. Table 1. Voltage Identification Code§¶ VID Terminals† VREF−RR‡ (Vdc) VREF−LDO‡ (Vdc) VID1 VID0 VREF−RR‡ (Vdc) VREF−LDO‡ (Vdc) 0 0 1.30 1.5 0 1 1.50 1.80 0 2 1.30 1.80 1 0 1.80 3.30 1 1 1.30 1.30 1 2 2.50 3.30 2 0 1.30 2.50 2 1 1.50 3.30 2 2 1.80 2.50 † 0 = ground (GND), 1 = floating(Vbias/2), 2 = (Vbias) ‡ RR = Ripple Regulator, LDO = Low Drop-Out Regulator § Vbias/2 is internal, leave VID pin floating. Adding an external 0.1-µF capacitor to ANAGND may be used to avoid erroneous level. ¶ External resistors may be used as a voltage divider (from VOUT to VSEN−xx to Gnd) to program output voltages to other values. |
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