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ICS840004AG Datasheet(PDF) 11 Page - Integrated Circuit Systems |
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ICS840004AG Datasheet(HTML) 11 Page - Integrated Circuit Systems |
11 / 13 page Integrated Circuit Systems, Inc. 840004AG www.icst.com/products/hiperclocks.html REV. A SEPTEMBER 16, 2004 11 ICS840004 FEMTOCLOCKS™CRYSTAL-TO- LVCMOS/LVTTL FREQUENCY SYNTHESIZER PRELIMINARY RELIABILITY INFORMATION TRANSISTOR COUNT The transistor count for ICS840004 is: TBD TABLE 6. θ JA VS . AIR FLOW TABLE FOR 20 LEAD TSSOP θθθθθ JA by Velocity (Linear Feet per Minute) 0 200 500 Single-Layer PCB, JEDEC Standard Test Boards 114.5°C/W 98.0°C/W 88.0°C/W Multi-Layer PCB, JEDEC Standard Test Boards 73.2°C/W 66.6°C/W 63.5°C/W NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs. R2 10 To Logic Input pins VDDA C4 0.01u RD1 Not Install C3 10uF 3.3V LVCMOS LVCMOS Zo = 50 Ohm XTAL_OUT Set Logic Input to '1' Logic Control Input Examples XTAL_IN RD2 1K R3 36 C1 22pF X1 R4 36 Set Logic Input to '0' 3.3V Zo = 50 Ohm C6 0.1u C2 22pF 3.3V RU1 1K C5 0.1u 3.3V 3.3V To Logic Input pins RU2 Not Install U1 ICS840004 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 20 19 18 17 F_SEL0 nc nXTAL_SEL TEST_CLK OE MR nPLL_SEL VDDA nc VDD XTAL_OUT XTAL_IN GND Q3 Q2 VDDO F_SEL1 GND Q0 Q1 LAYOUT GUIDELINE Figure 3 shows a schematic example of the ICS840004. An example of LVCMOS termination is shown in this schematic. Additional LVCMOS termination approaches are shown in the LVCMOS Termination Application Note. In this example, an 18 pF parallel resonant 26.5625MHz crystal is used. The C1=22pF FIGURE 3. ICS840004 SCHEMATIC EXAMPLE and C2=22pF are recommended for frequency accuracy. For different board layout, the C1 and C2 may be slightly adjusted for optimizing frequency accuracy. 1K Ω pullup or pulldown re- sistors can be used for the logic control input pins. |
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