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SAA7706H Datasheet(PDF) 2 Page - NXP Semiconductors |
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SAA7706H Datasheet(HTML) 2 Page - NXP Semiconductors |
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2 / 52 page  2001 Mar 05 2 Philips Semiconductors Product specification Car radio Digital Signal Processor (DSP) SAA7706H CONTENTS 1 FEATURES 1.1 Hardware 1.2 Software 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 QUICK REFERENCE DATA 5 ORDERING INFORMATION 6 BLOCK DIAGRAM 7 PINNING 8 FUNCTIONAL DESCRIPTION 8.1 Analog front-end 8.1.1 The realization of common mode input with AIC 8.1.2 Realization of the auxiliary input with volume control 8.1.3 Realization of the FM input control 8.1.4 Pins VDACN1, VDACN2 and VDACP 8.1.5 Pin VREFAD 8.1.6 Supply of the analog inputs 8.2 The signal audio path for input signals CD, TAPE, AUX, PHONE, NAV and AM 8.3 Signal path for level information 8.4 Signal path from FM_MPX input to IAC and stereo decoder 8.4.1 Noise level 8.4.2 Mono or stereo switching 8.4.3 The automatic lock system 8.5 DCS clock 8.6 The Interference Absorption Circuit (IAC) 8.6.1 General description 8.7 The Filter Stream DAC (FSDAC) 8.7.1 Interpolation filter 8.7.2 Noise shaper 8.7.3 Function of pin POM 8.7.4 Power-off plop suppression 8.7.5 Pin VREFDA for internal reference 8.7.6 Supply of the filter stream DAC 8.8 Clock circuit and oscillator 8.8.1 Supply of the crystal oscillator 8.9 The phase-locked loop circuit to generate the DSPs and other clocks 8.10 Supply of the digital part (VDDD3V1 to VDDD3V4) 8.11 CL_GEN, audio clock recovery block 8.12 External control pins 8.12.1 DSP1 8.12.2 DSP2 8.13 I2C-bus control (pins SCL and SDA) 8.14 Digital serial inputs/outputs and SPDIF inputs 8.14.1 General description digital serial audio inputs/outputs 8.14.2 General description SPDIF inputs (SPDIF1 and SPDIF2) 8.14.3 Digital data stream formats 8.15 RDS demodulator (pins RDS_CLOCK and RDS_DATA) 8.15.1 Clock and data recovery 8.15.2 Timing of clock and data signals 8.15.3 Buffering of RDS data 8.15.4 Buffer interface 8.16 DSP reset 8.17 Test mode connections (pins TSCAN, RTCB and SHTCB) 9I2C-BUS FORMAT 9.1 Addressing 9.2 Slave address (pin A0) 9.3 Write cycles 9.4 Read cycles 9.5 SAA7706H hardware registers 9.5.1 SAA7706H DSPs registers 9.6 I2C-bus memory map specification 10 LIMITING VALUES 11 THERMAL CHARACTERISTICS 12 CHARACTERISTICS 13 RDS AND I2S-BUS TIMING 14 I2C-BUS TIMING 15 SOFTWARE DESCRIPTION 16 APPLICATION DIAGRAM 17 PACKAGE OUTLINE 18 SOLDERING 18.1 Introduction to soldering surface mount packages 18.2 Reflow soldering 18.3 Wave soldering 18.4 Manual soldering 18.5 Suitability of surface mount IC packages for wave and reflow soldering methods 19 DATA SHEET STATUS 20 DEFINITIONS 21 DISCLAIMERS 22 PURCHASE OF PHILIPS I2C COMPONENTS |
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