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TMP320C6414GFN100 Datasheet(PDF) 6 Page - Texas Instruments |
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TMP320C6414GFN100 Datasheet(HTML) 6 Page - Texas Instruments |
6 / 70 page TMS320C6205 FIXED-POINT DIGITAL SIGNAL PROCESSOR SPRS106E − OCTOBER 1999 − REVISED MARCH 2004 6 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 functional and CPU (DSP core) block diagram 32 32 Control Logic Test C62x DSP Core Data Path B B Register File Program Access/Cache Controller Instruction Fetch Instruction Dispatch Instruction Decode Data Path A A Register File Data Access Controller Power- Down Logic .L1 .S1 .M1 .D1 .D2 .M2 .S2 .L2 SDRAM or SBSRAM ROM/FLASH SRAM I/O Devices Timer 0 Timer 1 External Memory Interface (EMIF) Multichannel Buffered Serial Port 0 Multichannel Buffered Serial Port 1 Direct Memory Access Controller (DMA) (4 Channels) Master/Slave PCI Interface Internal Program Memory 1 Block Program/Cache (64K Bytes) Control Registers Internal Data Memory (64K Bytes) 2 Blocks of 4 Banks Each In-Circuit Emulation Interrupt Control Framing Chips: H.100, MVIP, SCSA, T1, E1 AC97 Devices, SPI Devices, Codecs C6205 Digital Signal Processor PLL (x1, x4, x6, x7, x8, x9, x10, x11) EEPROM Boot Configuration Interrupt Selector Peripheral Control Bus |
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