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NIS5431MT1TWG Datasheet(PDF) 2 Page - ON Semiconductor

Part # NIS5431MT1TWG
Description  3.3 Volt Electronic Fuse
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

NIS5431MT1TWG Datasheet(HTML) 2 Page - ON Semiconductor

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NIS5431 Series
www.onsemi.com
2
VIN
VOUT
Enable/Fault
GND
Thermal
Shutdown
Charge
Pump
Current
Limit
dv/dt
Control
Enable
UVLO
dV/dt
I LIMITB
Voltage
Clamp
Figure 1. Block Diagram
I LIMITA
FUNCTIONAL PIN DESCRIPTION
Pin
Function
Description
1−5
Source
This pin is the source of the internal power FET and the output terminal of the fuse.
6
ILIMITA
A resistor between this pin and the ILIMITB pin sets the overload and short circuit current limit levels.
7
ILIMITB
A resistor between this pin and the ILIMITA pin sets the overload and short circuit current limit levels.
8
Enable/Fault
The enable/fault pin is a tri−state, bidirectional interface. It can be used to enable or disable the
output of the device by pulling it to ground using an open drain or open collector device. If a thermal
fault occurs, the voltage on this pin will go to an intermediate state to signal a monitoring circuit that
the device is in thermal shutdown. It can also be connected to another device in this family to cause
a simultaneous shutdown during thermal events.
9
dv/dt
The internal dv/dt circuit controls the slew rate of the output voltage at turn on. It has an internal ca-
pacitor that allows it to ramp up over a period of 1.4 ms. An external capacitor can be added to this
pin to increase the ramp time. If an additional time delay is not required, this pin should be left open.
10
Ground
Negative input voltage to the device. This is used as the internal reference for the IC.
11 (belly pad)
VCC
Positive input voltage to the device.
MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Input Voltage, operating, steady−state (VCC to GND, Note 1)
VIN
−0.6 to 14
V
Thermal Resistance, Junction−to−Air
0.1 in2 copper (Note 2)
0.5 in2 copper (Note 2)
JESD51−7 4−layer board
qJA
154
93
50
°C/W
Thermal Resistance, Junction−to−Lead (Pin 1)
qJL
49
°C/W
Thermal Resistance, Junction−to−Case
qJC
20
°C/W
Total Power Dissipation @ TA = 25°C (operating)
Pmax
2.5
W
Operating Temperature Range (Notes 3 and 4)
TJ
−40 to 150
°C
Nonoperating Temperature Range
TJ
−55 to 155
°C
Lead Temperature, Soldering (10 Sec)
TL
260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Negative voltage will not damage device provided that the power dissipation is limited to the rated allowable power for the device.
2. 1 oz copper, double−sided FR4.
3. Thermal limit is set above the maximum thermal rating. It is not recommended to operate this device at temperatures greater than the
maximum ratings for extended periods of time.
4. Exceeding TJ will thermally destroy the FET. See AND9042/D.


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