DS90CR563 Pin Descriptions — FPD Link Transmitter

Pin Name

I/O

No.

Description

TxIN

I

21

TTL level input. This includes: 6 Red, 6 Green, 6 Blue, and 3 control lines — FPLINE,

FPFRAME, DRDY(also referred to as HSYNC, VSYNC, Data Enable)

TxOUT+

O

3

Positive LVDS differential data output

TxOUT−

O

3

Negative LVDS differential data output

FPSHIFT IN

I

1

TTL level clock input. The falling edge acts as data strobe

TxCLK OUT+

O

1

Positive LVDS differential clock output

TxCLK OUT−

O

1

Negative LVDS differential clock output

PWR DOWN

I

1

TTL level input. Assertion (low input) TRI-STATES the outputs, ensuring low current at power

down

V

CC

I

4

Power supply pins for TTL inputs

GND

I

5

Ground pins for TTL inputs

PLL V

CC

I

1

Power supply pin for PLL

DS012617-19

FIGURE 16. 21 Parallel TTL Data Inputs Mapped to LVDS Outputs (DS90CR563)

DS012617-20

FIGURE 17. Receiver Powerdown Delay

DS012617-21

FIGURE 18. Transmitter Powerdown Delay

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