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IDT72V265LA Datasheet(PDF) 8 Page - Integrated Device Technology

Part # IDT72V265LA
Description  3.3 VOLT CMOS SuperSync FIFO 8,192 x 18 16,384 x 18
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT72V265LA Datasheet(HTML) 8 Page - Integrated Device Technology

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IDT72V255LA/72V265LA 3.3 VOLT CMOS SuperSync FIFO™
8,192 x 18, 16,384 x 18
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
PROGRAMMING FLAG OFFSETS
Full and Empty Flag offset values are user programmable. The
IDT72V255LA/72V265LA has internal registers for these offsets. Default
settings are stated in the footnotes of Table 1 and Table 2. Offset values can
be programmed into the FIFO in one of two ways; serial or parallel loading
method. The selection of the loading method is done using the
LD (Load)
pin. During Master Reset, the state of the
LD input determines whether
serial or parallel flag offset programming is enabled. A HIGH on
LD during
Master Reset selects serial loading of offset values and in addition, sets a
default
PAE offset value of 3FFH (a threshold 1,023 words from the empty
boundary), and a default
PAF offset value of 3FFH (a threshold 1,023
words from the full boundary). A LOW on
LD during Master Reset selects
parallel loading of offset values, and in addition, sets a default
PAE offset
72V255LA
72V265LA
FF PAF HF PAE EF
00
H
H
H
L
L
1 to n (1)
1 to n (1)
HH
H
L
H
(n + 1) to 4,096
(n + 1) to 8,192
H
H
H
H
H
4,097 to (8,192–(m+1))
8,193 to (16,384–(m+1))
H
HLH
H
(8,192–m)(2) to 8,191
(16,384–m) (2) to 16,383
H
L
L
H
H
8,192
16,384
L
L
L
H
H
NOTES:
1. n = Empty Offset, Default Values: n = 127 when parallel offset loading is selected or n = 1,023 when serial offset loading is selected.
2. m = Full Offset, Default Values: m = 127 when parallel offset loading is selected or m = 1,023 when serial offset loading is selected.
TABLE 1 — STATUS FLAGS FOR IDT STANDARD MODE
Number of
Words in
FIFO
72V255LA
72V265LA
FF PAF HF PAE EF
00
L
H
H
L
H
1 to n+1 (1)
1 to n+1 (1)
LH
H
L
L
(n + 2) to 4,097
(n + 2) to 8,193
L
H
H
H
L
4,098 to (8,193–(m+1))(2)
8,194 to (16,385–(m+1)) (2)
LH
L
H
L
(8,193–m) to 8,192
(16,385–m) (2) to 16,384
L
L
L
H
L
8,193
16,385
H
L
L
H
L
NOTES:
1. n = Empty Offset, Default Values: n = 127 when parallel offset loading is selected or n = 1,023 when serial offset loading is selected.
2. m = Full Offset, Default Values: m = 127 when parallel offset loading is selected or m = 1,023 when serial offset loading is selected.
TABLE 2 — STATUS FLAGS FOR FWFT MODE
Number of
Words in
FIFO (1)
4672 drw 05
value of 07FH (a threshold 127 words from the empty boundary), and a
default
PAF offset value of 07FH (a threshold 127 words from the full
boundary). See Figure 3, Offset Register Location and Default Values.
In addition to loading offset values into the FIFO, it also possible to read
the current offset values. It is only possible to read offset values via parallel
read.
Figure 4, Programmable Flag Offset Programming Sequence, summa-
rizes the control pins and sequence for both serial and parallel program-
ming modes. For a more detailed description, see discussion that follows.
The offset registers may be programmed (and reprogrammed) any time
after Master Reset, regardless of whether serial or parallel programming
has been selected.


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