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IDT77V107L25PFI Datasheet(PDF) 5 Page - Integrated Device Technology |
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IDT77V107L25PFI Datasheet(HTML) 5 Page - Integrated Device Technology |
5 / 24 page 5 of 24 July 3, 2001 IDT77V107 Functional Description Functional Description Functional Description Functional Description Transmission convergence (TC) sub layer Transmission convergence (TC) sub layer Transmission convergence (TC) sub layer Transmission convergence (TC) sub layer Introduction Introduction Introduction Introduction The TC sub layer defines the line coding, scrambling, data framing and synchronization. Under control of a switch interface or Segmenta- tion and Reassembly (SAR) unit, the 25.6Mbps ATM PHY accepts a 53- byte ATM cell, scrambles the data, appends a command byte to the beginning of the cell, and encodes the entire 53 bytes before transmis- sion. These data transformations ensure that the signal is evenly distrib- uted across the frequency spectrum. In addition, the serialized bit stream is NRZI coded. An 8kHz timing sync pulse may be used for isochronous communications. Data Structure and Framing Data Structure and Framing Data Structure and Framing Data Structure and Framing Each 53-byte ATM cell is preceded with a command byte. This byte is distinguished by an escape symbol followed by one of 17 encoded symbols. Together, this byte forms one of seventeen possible command bytes. Three command bytes are defined: 1. X_X (read: 'escape' symbol followed by another 'escape'): Start- of-cell with scrambler/descrambler reset. 2. X_4 ('escape' followed by '4'): Start-of-cell without scrambler/ descrambler reset. 3. X_8 ('escape' followed by '8'): 8kHz timing marker. This command byte is generated when the 8kHz sync pulse is detected, and has priority over all line activity (data or command bytes). It is transmitted immediately when the sync pulse is detected. When this occurs during a cell transmission, the data transfer is temporarily interrupted on an octet boundary, and the X_8 command byte is inserted. This condition is the only allowed interrupt in an otherwise contiguous transfer. Below is an illustration of the cell structure and command byte usage: {X_X} {53-byte ATM cell} {X_4} {53-byte ATM {X_8} cell} ... In the above example, the first ATM cell is preceded by the X_X start- of-cell command byte which resets both the transmitter-scrambler and receiver-descrambler pseudo-random nibble generators (PRNG) to their initial states. The following cell illustrates the insertion of a start-of-cell command without scrambler/descrambler reset. During this cell's trans- mission, an 8kHz timing sync pulse triggers insertion of the X_8 8kHz timing marker command byte. Figure 2 TC Transmit Block Diagram PHY-ATM Interface Control, HEC Gen. & Insertion Scrambler 4 Command Byte Insertion 4 PRNG 4 Scramble Nibble Next Reset 4b/5b Encoding 4 NRZI Encoding 1 Tx + Tx - Line Rate Clock TxRef (8kHz) 5362 drw 05 3 Cells Start of Cell UTOPIA Interface . |
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