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IDT72V835L20PF Datasheet(PDF) 8 Page - Integrated Device Technology

Part # IDT72V835L20PF
Description  3.3 VOLT CMOS DUAL SyncFIFO DUAL 256 x 18, DUAL 512 x 18, DUAL 1,024 x 18, DUAL 2,048 x 18
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT72V835L20PF Datasheet(HTML) 8 Page - Integrated Device Technology

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IDT72V805/72V815/72V825/72V835/72V845
3.3 V CMOS DUAL SyncFIFO™ 256 x 18, 512 x 18, 1,024 x 18, 4,096 x 18
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
Output Ready (
OR)
Input Ready (
IR)
Partial Flags
Programming at Reset
Flag Timing
FL
RXI
WXI
Diagrams
Triple
Double
Asynch
0
0
1
Figure 27
Triple
Double
Sync
1
0
1
Figure 20, 21
Empty Flag (
EF)
Full Flag (
FF)
Partial Flags
Programming at Reset
Flag Timing
Buffered Output
Buffered Output
Timing Mode
FL
RXI
WXI
Diagrams
Single
Single
Asynch
0
0
0
Figure 9, 10
Single
Single
Sync
1
0
0
Figure 9, 10
Double
Double
Asynch
0
1
0
Figure 24, 26
Double
Double
Synch
1
1
0
Figure 24, 26
FL
RXI
WXI
EF/OR
FF/IR
PAE, PAF
FIFO TIMING MODE
0
0
0
Single Register-Buffered
Single Register-Buffered
Asynchronous
Standard
Empty Flag
Full Flag
0
0
1
Triple Register-Buffered
Double Register-Buffered
Asynchronous
FWFT
Output Ready Flag
Input Ready Flag
0
1
0
Double Register-Buffered
Double Register-Buffered
Asynchronous
Standard
Empty Flag
Full Flag
0(1)
1
1
Single Register-Buffered
Single Register-Buffered
Asynchronous
Standard
Empty Flag
Full Flag
1
0
0
Single Register-Buffered
Single Register-Buffered
Synchronous
Standard
Empty Flag
Full Flag
1
0
1
Triple Register-Buffered
Double Register-Buffered
Synchronous
FWFT
Output Ready Flag
Input Ready Flag
1
1
0
Double Register-Buffered
Double Register-Buffered
Synchronous
Standard
Empty Flag
Full Flag
1(2)
1
1
Single Register-Buffered
Single Register-Buffered
Asynchronous
Standard
Empty Flag
Full Flag
NOTES:
1. In a daisy-chain depth expansion,
FL is held LOW for the "first load device". The RXI and WXI inputs are driven by the corresponding RXO and WXO outputs of the preceding device.
2. In a daisy-chain depth expansion,
FL is held HIGH for members of the expansion other than the "first load device". The RXI and WXI inputs are driven by the corresponding RXO
and
WXO outputs of the preceding device.
TABLE 3 — TRUTH TABLE FOR CONFIGURATION AT RESET
TABLE 4 — REGISTER-BUFFERED FLAG OUTPUT OPTIONS — IDT STANDARD MODE
TABLE 5 — REGISTER-BUFFERED FLAG OUTPUT OPTIONS — FWFT MODE


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