K4S283233F - F(H)E/N/G/C/L/F

February 2004

Mobile-SDRAM

NOTES :

1. Parameters depend on programmed CAS latency.

2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.

3. Assumed input rise and fall time (tr & tf) = 1ns.

If tr & tf is longer than 1ns, transient time compensation should be considered,

i.e., [(tr + tf)/2-1]ns should be added to the parameter.

Parameter

Symbol

- 60

- 75

-1H

-1L

Unit

Note

Min

Max

Min

Max

Min

Max

Min

Max

CLK cycle time

CAS latency=3

6.0

1000

7.5

1000

9.5

1000

9.5

1000

ns

1

CAS latency=2

-

9.5

9.5

12

CAS latency=1

-

-

-

25

CLK to valid output delay

CAS latency=3

5.4

6

7

7

ns

1,2

CAS latency=2

-

7

7

8

CAS latency=1

-

-

-

20

Output data hold time

CAS latency=3

2.5

2.5

2.5

2.5

ns

2

CAS latency=2

-

2.5

2.5

2.5

CAS latency=1

-

-

-

2.5

CLK high pulse width

2.5

2.5

3

3

ns

3

CLK low pulse width

2.5

2.5

3

3

ns

3

Input setup time

2.0

2.0

2.5

2.5

ns

3

Input hold time

1.0

1.0

1.5

1.5

ns

3

CLK to output in Low-Z

1

1

1

1

ns

2

CLK to output in Hi-Z

CAS latency=3

5.4

6

7

7

ns

CAS latency=2

-

7

7

8

CAS latency=1

-

-

-

20