TAS5182

SLES045E - JUNE 2002 - REVISED MAY 2004

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7

TIMING DIAGRAMS

AP

GHS_A

AM

GLS_A

Figure 1. PWM Input to Gate Drive Output Timing (Same for A, B, C, and D Half-Bridge Drivers)

RESET

SHUTDOWN

Figure 2. RESET to SHUTDOWN Propagation Delay

GHS_A

GLS_A

RESET

Figure 3. RESET to Gate Drive Output Propagation Delay (Same for Half-Bridge A, B, C, and D)