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TLV320AIC14I Datasheet(PDF) 9 Page - Texas Instruments |
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TLV320AIC14I Datasheet(HTML) 9 Page - Texas Instruments |
9 / 50 page 1–2 • Smart Time Division Multiplexed Serial Port (SMARTDM) – Glueless 4-Wire Interface to DSP – Automatic Cascade Detection (ACD) Self-Generates Master/Slave Device Addresses – Programming Mode to Allow On-the-Fly Reconfiguration – Continuous Data Transfer Mode to Support DSP’s DMA/Autobuffering Mode – Turbo Mode to Maximize Bit Clock for Faster Data Transfer and Higher Data Bandwidth – Total Number of Time Slots Dynamically Proportional to Number of Codecs in the Cascade to Eliminate Unused Time Slots and Optimize DSP Memory Allocation – Allows up to 16 Codecs to Be Connected to a Single Serial Port • Host Port – 2-Wire Interface – Selectable I2C or S2C • Differential and Single-Ended Analog Input/Output • Built-In Functions: – Sidetone – Antialiasing Filter (AAF) – Programmable Input and Output Gain Control (PGA) – Microphone Amplifiers – Power Management With Hardware/Software Power-Down Modes 30 µW • Separate Software Control for ADC and DAC Power Down • Fully Compatible With TI C54x DSP Power Supplies – 1.65 V–1.95 V Digital Core Power – 2.7 V–3.6 V Digital I/O – 2.7 V–3.6 V Analog • Power Dissipation (PD) 10 mW at 3 V in Standard Operation • Internal Reference Voltage (Vref) • 2s Complement Data Format • Test Mode Which Includes Digital Loopback and Analog Loopback |
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