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PESD2USB3S Datasheet(PDF) 11 Page - NXP Semiconductors |
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PESD2USB3S Datasheet(HTML) 11 Page - NXP Semiconductors |
11 / 19 page PESDXUSB3S_SER All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet Rev. 3 — 26 April 2016 11 of 19 NXP Semiconductors PESDxUSB3S series ESD protection for differential data lines 8. Package outline Fig 15. Package outline WLCSP5 References Outline version European projection Issue date IEC JEDEC JEITA PESD1USB3S pesd1usb3s_po Unit mm max nom min 0.60 0.38 0.82 1.22 A Dimensions (mm are the original dimensions) WLCSP5: wafer level chip-size package; 5 bumps (2-1-2) PESD1USB3S A1 b 0.31 DE e e1 e2 0.80 0.57 0.37 0.77 1.17 0.40 0.40 0.26 0.54 0.36 0.72 1.12 0.21 0 1 mm scale detail X A A1 X A B C E D 2 1 e2 e1 e b 1/2 e B1 bump A1 index area bump A1 index area 15-12-11 |
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Similar Description - PESD2USB3S |
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