NCV7710

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8

ELECTRICAL CHARACTERISTICS

4.5 V < Vcc < 5.25 V, 8 V < Vs < 18 V, −40°C < Tj < 150°C; unless otherwise noted.

Symbol

Unit

Max

Typ

Min

Test Conditions

Parameter

DIGITAL INPUTS CSB, SCLK, PWM1/2, SI

Vinl

Input low level

Vcc = 5 V

0.3·Vcc

V

Vinh

Input high level

0.7·Vcc

V

Vin_hyst

Input hysteresis

500

mV

Rcsb_pu

CSB pull−up resistor

Vcc = 5 V,

0 V < Vcsb < 0.7·Vcc

30

120

250

kW

Rsclk_pd

SCLK pull−down resistor

Vcc = 5 V,

Vsclk = 1.5 V

30

60

220

kW

Rsi_pd

SI pull−down resistor

Vcc = 5 V,

Vsi = 1.5 V

30

60

220

kW

Rpwm1_pd

PWM1 pull−down resistor

Vcc = 5 V

Vpwm1 = 1.5 V

30

60

220

kW

Rpwm2_pd

PWM2 pull−down resistor

Vcc = 5 V,

Vpwm2 = 1.5 V,

current sense disabled

30

60

220

kW

Ileak_isout

Output leakage current

Vpwm2 = 0 V,

current sense enabled

−1

1

mA

Ccsb/sclk/pwm1/2

Pin capacitance

0 V < Vcc < 5.25 V (Note 8)

10

pF

DIGITAL INPUTS CSB, SCLK, SI; TIMING

tsclk

Clock period

Vcc = 5 V

1000

ns

tsclk_h

Clock high time

115

ns

tsclk_l

Clock low time

115

ns

tset_csb

CSB setup time, CSB low before rising

edge of SCLK

400

ns

tset_sclk

SCLK setup time, SCLK low before rising

edge of CSB

400

ns

tset_si

SI setup time

200

ns

thold_si

SI hold time

200

ns

tr_in

Rise time of input signal SI, SCLK, CSB

100

ns

tf_in

Fall time of input signal SI, SCLK, CSB

100

ns

tcsb_hi_stdby

Minimum CSB high time, switching from

Standby mode

Transfer of SPI−command to

input register, valid before tsact

mode transition delay expires

5

10

ms

tcsb_hi_min

Minimum CSB high time, Active mode

2

4

ms

8. Values based on design and/or characterization.