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DA14583 Datasheet(PDF) 9 Page - Dialog Semiconductor |
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DA14583 Datasheet(HTML) 9 Page - Dialog Semiconductor |
9 / 148 page © 2014 Dialog Semiconductor 9 Target - March 06, 2015 v1.1 Core drivers are provided for each interface of the DA14580 enabling optimized usage of the hardware’s capabilities. These drivers provide an easy-to-use interface towards the hardware engines without having to interfere with the register programming directly. On top of the core drivers, a number of sample drivers is also provided enabling communication with basic Bluetooth Smart application components: accelerome- ters, FLASH/EEPROM non-volatile memories, etc. 3.3 MEMORIES The following memories are part of the DA14580’s internal blocks: ROM. This is a 84 kB ROM containing the Bluetooth Smart protocol stack as well as the boot code sequence. OTP: This is a 32 kB One-Time Programmable mem- ory array used to store the secondary boot loader, which loads the application code from Flash memory after power/wake up. The OTP memory also contains the system configuration and the calibration data. System SRAM. This is a 42 kB system SRAM (Sys- RAM) which is primarily used for mirroring the program code from the OTP when the system wakes/powers up. It also serves as Data RAM for intermediate varia- bles and various data that the protocol requires. Optionally, it can be used as extra memory space for the BLE TX and RX data structures. Retention RAMs. These are 4 special low leakage SRAM cells (2 kB + 2 kB + 3 kB + 1 kB) used to store various data of the Bluetooth Smart protocol as well as the system’s global variables and processor stack when the system goes into Extended Sleep mode. Storage of this data ensures secure and quick configu- ration of the BLE Core after the system wakes up. Every cell can be powered on or off according to the application needs for retention area when in Extended Sleep mode. Flash. This is a 1 Mbit Flash memory, which is used to store the application code and code for all supported Bluetooth Smart profiles. 3.4 FUNCTIONAL MODES The DA14583 is optimized for deeply embedded appli- cations such as health monitoring, sports measuring, human interaction devices etc. Customers are able to develop and test their own applications. Upon comple- tion of the development, the application code can be programmed into the Flash memory. In general, the system has three functional modes of operation: A. Development mode: During this phase application code is developed using the ARM Cortex-M0 SW envi- ronment. The compiled code is then downloaded into the System RAM or any Retention RAMs by means of SWD (JTAG) or any serial interface (e.g. UART). Address 0x00 is remapped to the physical memory that contains the code and the CPU is configured to reset and execute code from the remapped device. This mode is enabling application development, debugging and on-the-fly testing. B. Normal mode: When the application is ready and has been verified, the code can be burned into the embedded Flash memory. When the system boots/ wakes up, the DMA of the OTP controller will automati- cally copy the secondary boot loader from OTP to sys- tem RAM. This boot loader then copies the content of the Flash memory into system RAM. Next, a software reset or a jump to the system RAM occurs and execu- tion of the application code is started. Hence, in this mode the system is autonomous, contains the required software in the Flash memory and is ready for integra- tion into the final product. C. Calibration mode: Between Development and Nor- Figure 4 Hardware abstraction layer GPIO Driver Application Accelerometer Driver SPI Driver UART Driver SPI FLASH Driver ADC Driver Battery Driver Quadrature EEPROM I2C Driver Sample Drivers CORE Drivers Timers |
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